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[PATCH 09/20] hw/block: Factor pflash_cfi01_create() out of pflash_cfi01
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 09/20] hw/block: Factor pflash_cfi01_create() out of pflash_cfi01_register() |
Date: |
Wed, 4 Jan 2023 23:04:38 +0100 |
Currently pflash_cfi01_register():
1/ creates a TYPE_PFLASH_CFI01 qdev instance
2/ maps the first MMIO region to the system bus
The first minor issue is the implicit sysbus mapping is not
obvious (the function name could mention it), and the function
is not documented.
Another issue is we are forced to map on sysbus, thus code
wanting to simply instantiate this device are forced to open
code the qdev creation.
This is a problem in a heterogeneous system where not all cores
has access to the sysbus, or if we want to map the pflash on
different address spaces.
To clarify this API, extract the qdev creation in a new helper
named pflash_cfi01_create().
We don't document pflash_cfi01_register() because we are going
to remove it in a few commits.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/block/pflash_cfi01.c | 34 +++++++++++++++++++++++++---------
include/hw/block/flash.h | 14 +++++++++++++-
2 files changed, 38 insertions(+), 10 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 866ea596ea..6a8f9e6319 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -953,15 +953,13 @@ static void pflash_cfi01_register_types(void)
type_init(pflash_cfi01_register_types)
-PFlashCFI01 *pflash_cfi01_register(hwaddr base,
- const char *name,
- hwaddr size,
- BlockBackend *blk,
- uint32_t sector_len,
- int bank_width,
- uint16_t id0, uint16_t id1,
- uint16_t id2, uint16_t id3,
- int be)
+DeviceState *pflash_cfi01_create(const char *name,
+ hwaddr size,
+ BlockBackend *blk, uint32_t sector_len,
+ int bank_width,
+ uint16_t id0, uint16_t id1,
+ uint16_t id2, uint16_t id3,
+ int be)
{
DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01);
@@ -980,7 +978,25 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
qdev_prop_set_string(dev, "name", name);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+ return dev;
+}
+
+PFlashCFI01 *pflash_cfi01_register(hwaddr base,
+ const char *name,
+ hwaddr size,
+ BlockBackend *blk,
+ uint32_t sector_len,
+ int bank_width,
+ uint16_t id0, uint16_t id1,
+ uint16_t id2, uint16_t id3,
+ int be)
+{
+ DeviceState *dev;
+
+ dev = pflash_cfi01_create(name, size, blk, sector_len, bank_width,
+ id0, id1, id2, id3, be);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+
return PFLASH_CFI01(dev);
}
diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
index 25affdf7a5..40ba857f69 100644
--- a/include/hw/block/flash.h
+++ b/include/hw/block/flash.h
@@ -11,7 +11,19 @@
#define TYPE_PFLASH_CFI01 "cfi.pflash01"
OBJECT_DECLARE_SIMPLE_TYPE(PFlashCFI01, PFLASH_CFI01)
-
+/**
+ * Create and realize a parallel NOR flash (CFI type 1) on the heap.
+ *
+ * Create the device state structure, initialize it, and drop the
+ * reference to it (the device is realized).
+ */
+DeviceState *pflash_cfi01_create(const char *name,
+ hwaddr size,
+ BlockBackend *blk, uint32_t sector_len,
+ int bank_width,
+ uint16_t id0, uint16_t id1,
+ uint16_t id2, uint16_t id3,
+ int be);
PFlashCFI01 *pflash_cfi01_register(hwaddr base,
const char *name,
hwaddr size,
--
2.38.1
- [PATCH 00/20] hw: Remove implicit sysbus_mmio_map() from pflash APIs, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 01/20] hw/block: Pass DeviceState to pflash_cfi01_get_blk(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 02/20] hw/block: Use pflash_cfi01_get_blk() in pflash_cfi01_legacy_drive(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 03/20] hw/block: Pass DeviceState to pflash_cfi01_get_memory(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 04/20] hw/arm: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 05/20] hw/loongarch: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 06/20] hw/riscv: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 07/20] hw/i386: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 08/20] hw/xtensa: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 09/20] hw/block: Factor pflash_cfi01_create() out of pflash_cfi01_register(),
Philippe Mathieu-Daudé <=
- [PATCH 10/20] hw/arm: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 11/20] hw/microblaze: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 12/20] hw/mips: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 13/20] hw/ppc: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 14/20] hw/block: Remove unused pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 16/20] hw/block: Factor pflash_cfi02_create() out of pflash_cfi02_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 15/20] hw/block: Make PFlashCFI01 QOM declaration internal, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 17/20] hw/arm: Open-code pflash_cfi02_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 18/20] hw/sh4: Open-code pflash_cfi02_register(), Philippe Mathieu-Daudé, 2023/01/04