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[PATCH 10/20] hw/arm: Open-code pflash_cfi01_register()
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 10/20] hw/arm: Open-code pflash_cfi01_register() |
Date: |
Wed, 4 Jan 2023 23:04:39 +0100 |
pflash_cfi01_register() hides an implicit sysbus mapping of
MMIO region #0. This is not practical in a heterogeneous world
where multiple cores use different address spaces. In order to
remove to remove pflash_cfi01_register() from the pflash API,
open-code it as a qdev creation call followed by an explicit
sysbus mapping.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/collie.c | 15 +++++++++------
hw/arm/gumstix.c | 19 +++++++++++++------
hw/arm/mainstone.c | 13 ++++++++-----
hw/arm/omap_sx1.c | 22 ++++++++++++++--------
hw/arm/versatilepb.c | 13 ++++++++-----
hw/arm/z2.c | 10 +++++++---
6 files changed, 59 insertions(+), 33 deletions(-)
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index 8df31e2793..1fbb1a5773 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -39,6 +39,7 @@ static void collie_init(MachineState *machine)
DriveInfo *dinfo;
MachineClass *mc = MACHINE_GET_CLASS(machine);
CollieMachineState *cms = COLLIE_MACHINE(machine);
+ DeviceState *dev;
if (machine->ram_size != mc->default_ram_size) {
char *sz = size_to_str(mc->default_ram_size);
@@ -52,14 +53,16 @@ static void collie_init(MachineState *machine)
memory_region_add_subregion(get_system_memory(), SA_SDCS0, machine->ram);
dinfo = drive_get(IF_PFLASH, 0, 0);
- pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000,
- dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
+ dev = pflash_cfi01_create("collie.fl1", 0x02000000,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SA_CS0);
dinfo = drive_get(IF_PFLASH, 0, 1);
- pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000,
- dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
+ dev = pflash_cfi01_create("collie.fl2", 0x02000000,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SA_CS1);
sysbus_create_simple("scoop", 0x40800000, NULL);
diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c
index 3a4bc332c4..7b80a7d0a4 100644
--- a/hw/arm/gumstix.c
+++ b/hw/arm/gumstix.c
@@ -40,6 +40,7 @@
#include "net/net.h"
#include "hw/block/flash.h"
#include "hw/net/smc91c111.h"
+#include "hw/sysbus.h"
#include "hw/boards.h"
#include "exec/address-spaces.h"
#include "sysemu/qtest.h"
@@ -51,6 +52,7 @@ static void connex_init(MachineState *machine)
{
PXA2xxState *cpu;
DriveInfo *dinfo;
+ DeviceState *dev;
MemoryRegion *address_space_mem = get_system_memory();
uint32_t connex_rom = 0x01000000;
@@ -65,12 +67,14 @@ static void connex_init(MachineState *machine)
exit(1);
}
- if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom,
- dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- sector_len, 2, 0, 0, 0, 0, 0)) {
+ dev = pflash_cfi01_create("connext.rom", connex_rom,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ sector_len, 2, 0, 0, 0, 0, 0);
+ if (!dev) {
error_report("Error registering flash memory");
exit(1);
}
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x00000000);
/* Interrupt line of NIC is connected to GPIO line 36 */
smc91c111_init(&nd_table[0], 0x04000300,
@@ -81,6 +85,7 @@ static void verdex_init(MachineState *machine)
{
PXA2xxState *cpu;
DriveInfo *dinfo;
+ DeviceState *dev;
MemoryRegion *address_space_mem = get_system_memory();
uint32_t verdex_rom = 0x02000000;
@@ -95,12 +100,14 @@ static void verdex_init(MachineState *machine)
exit(1);
}
- if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom,
- dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- sector_len, 2, 0, 0, 0, 0, 0)) {
+ dev = pflash_cfi01_create("verdex.rom", verdex_rom,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ sector_len, 2, 0, 0, 0, 0, 0);
+ if (!dev) {
error_report("Error registering flash memory");
exit(1);
}
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x00000000);
/* Interrupt line of NIC is connected to GPIO line 99 */
smc91c111_init(&nd_table[0], 0x04000300,
diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
index 8454b65458..ac34be3709 100644
--- a/hw/arm/mainstone.c
+++ b/hw/arm/mainstone.c
@@ -129,15 +129,18 @@ static void mainstone_common_init(MemoryRegion
*address_space_mem,
/* There are two 32MiB flash devices on the board */
for (i = 0; i < 2; i ++) {
+ DeviceState *dev;
+
dinfo = drive_get(IF_PFLASH, 0, i);
- if (!pflash_cfi01_register(mainstone_flash_base[i],
- i ? "mainstone.flash1" : "mainstone.flash0",
- MAINSTONE_FLASH,
- dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- sector_len, 4, 0, 0, 0, 0, 0)) {
+ dev = pflash_cfi01_create(i ? "mainstone.flash1" : "mainstone.flash0",
+ MAINSTONE_FLASH,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ sector_len, 4, 0, 0, 0, 0, 0);
+ if (!dev) {
error_report("Error registering flash memory");
exit(1);
}
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, mainstone_flash_base[i]);
}
mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS,
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index 57829b3744..718e50c062 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -30,6 +30,7 @@
#include "ui/console.h"
#include "hw/arm/omap.h"
#include "hw/boards.h"
+#include "hw/sysbus.h"
#include "hw/arm/boot.h"
#include "hw/block/flash.h"
#include "sysemu/qtest.h"
@@ -114,6 +115,7 @@ static void sx1_init(MachineState *machine, const int
version)
DriveInfo *dinfo;
int fl_idx;
uint32_t flash_size = flash0_size;
+ DeviceState *dev;
if (machine->ram_size != mc->default_ram_size) {
char *sz = size_to_str(mc->default_ram_size);
@@ -153,10 +155,12 @@ static void sx1_init(MachineState *machine, const int
version)
fl_idx = 0;
if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
- if (!pflash_cfi01_register(OMAP_CS0_BASE,
- "omap_sx1.flash0-1", flash_size,
- blk_by_legacy_dinfo(dinfo),
- sector_size, 4, 0, 0, 0, 0, 0)) {
+ dev = pflash_cfi01_create("omap_sx1.flash0-1", flash_size,
+ blk_by_legacy_dinfo(dinfo),
+ sector_size, 4, 0, 0, 0, 0, 0);
+ if (dev) {
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, OMAP_CS0_BASE);
+ } else {
fprintf(stderr, "qemu: Error registering flash memory %d.\n",
fl_idx);
}
@@ -175,10 +179,12 @@ static void sx1_init(MachineState *machine, const int
version)
memory_region_add_subregion(address_space,
OMAP_CS1_BASE + flash1_size, &cs[1]);
- if (!pflash_cfi01_register(OMAP_CS1_BASE,
- "omap_sx1.flash1-1", flash1_size,
- blk_by_legacy_dinfo(dinfo),
- sector_size, 4, 0, 0, 0, 0, 0)) {
+ dev = pflash_cfi01_create("omap_sx1.flash1-1", flash1_size,
+ blk_by_legacy_dinfo(dinfo),
+ sector_size, 4, 0, 0, 0, 0, 0);
+ if (dev) {
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, OMAP_CS1_BASE);
+ } else {
fprintf(stderr, "qemu: Error registering flash memory %d.\n",
fl_idx);
}
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index ecc1f6cf74..c5c7cf6dde 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -385,11 +385,14 @@ static void versatile_init(MachineState *machine, int
board_id)
/* 0x34000000 NOR Flash */
dinfo = drive_get(IF_PFLASH, 0, 0);
- if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, "versatile.flash",
- VERSATILE_FLASH_SIZE,
- dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- VERSATILE_FLASH_SECT_SIZE,
- 4, 0x0089, 0x0018, 0x0000, 0x0, 0)) {
+ dev = pflash_cfi01_create("versatile.flash",
+ VERSATILE_FLASH_SIZE,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ VERSATILE_FLASH_SECT_SIZE,
+ 4, 0x0089, 0x0018, 0x0000, 0x0, 0);
+ if (dev) {
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VERSATILE_FLASH_ADDR);
+ } else {
fprintf(stderr, "qemu: Error registering flash memory.\n");
}
diff --git a/hw/arm/z2.c b/hw/arm/z2.c
index 9c1e876207..d28d75aa0f 100644
--- a/hw/arm/z2.c
+++ b/hw/arm/z2.c
@@ -18,6 +18,7 @@
#include "hw/irq.h"
#include "hw/ssi/ssi.h"
#include "migration/vmstate.h"
+#include "hw/sysbus.h"
#include "hw/boards.h"
#include "hw/block/flash.h"
#include "ui/console.h"
@@ -306,17 +307,20 @@ static void z2_init(MachineState *machine)
void *z2_lcd;
I2CBus *bus;
DeviceState *wm;
+ DeviceState *dev;
/* Setup CPU & memory */
mpu = pxa270_init(address_space_mem, z2_binfo.ram_size, machine->cpu_type);
dinfo = drive_get(IF_PFLASH, 0, 0);
- if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE,
- dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- sector_len, 4, 0, 0, 0, 0, 0)) {
+ dev = pflash_cfi01_create("z2.flash0", Z2_FLASH_SIZE,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ sector_len, 4, 0, 0, 0, 0, 0);
+ if (!dev) {
error_report("Error registering flash memory");
exit(1);
}
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, Z2_FLASH_BASE);
/* setup keypad */
pxa27x_register_keypad(mpu->kp, map, 0x100);
--
2.38.1
- [PATCH 01/20] hw/block: Pass DeviceState to pflash_cfi01_get_blk(), (continued)
- [PATCH 01/20] hw/block: Pass DeviceState to pflash_cfi01_get_blk(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 02/20] hw/block: Use pflash_cfi01_get_blk() in pflash_cfi01_legacy_drive(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 03/20] hw/block: Pass DeviceState to pflash_cfi01_get_memory(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 04/20] hw/arm: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 05/20] hw/loongarch: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 06/20] hw/riscv: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 07/20] hw/i386: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 08/20] hw/xtensa: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 09/20] hw/block: Factor pflash_cfi01_create() out of pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 10/20] hw/arm: Open-code pflash_cfi01_register(),
Philippe Mathieu-Daudé <=
- [PATCH 11/20] hw/microblaze: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 12/20] hw/mips: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 13/20] hw/ppc: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 14/20] hw/block: Remove unused pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 16/20] hw/block: Factor pflash_cfi02_create() out of pflash_cfi02_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 15/20] hw/block: Make PFlashCFI01 QOM declaration internal, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 17/20] hw/arm: Open-code pflash_cfi02_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 18/20] hw/sh4: Open-code pflash_cfi02_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 20/20] hw/block: Make PFlashCFI02 QOM declaration internal, Philippe Mathieu-Daudé, 2023/01/04