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[PULL 42/67] target/ppc: combine multiple ail checks into one
From: |
Nicholas Piggin |
Subject: |
[PULL 42/67] target/ppc: combine multiple ail checks into one |
Date: |
Mon, 4 Nov 2024 10:18:31 +1000 |
From: Harsh Prateek Bora <harshpb@linux.ibm.com>
ppc_excp_apply_ail has multiple if-checks for ail which is un-necessary.
Combine them as appropriate.
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/excp_helper.c | 10 ++--------
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 2806afd9bd..70daa5076a 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -324,10 +324,7 @@ static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp,
target_ulong msr,
}
ail = (env->spr[SPR_LPCR] & LPCR_AIL) >> LPCR_AIL_SHIFT;
- if (ail == 0) {
- return;
- }
- if (ail == 1) {
+ if (ail == 0 || ail == 1) {
/* AIL=1 is reserved, treat it like AIL=0 */
return;
}
@@ -351,10 +348,7 @@ static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp,
target_ulong msr,
} else {
ail = (env->spr[SPR_LPCR] & LPCR_AIL) >> LPCR_AIL_SHIFT;
}
- if (ail == 0) {
- return;
- }
- if (ail == 1 || ail == 2) {
+ if (ail == 0 || ail == 1 || ail == 2) {
/* AIL=1 and AIL=2 are reserved, treat them like AIL=0 */
return;
}
--
2.45.2
- [PULL 31/67] target/ppc: Introduce 'PowerPCCPUClass::spapr_logical_pvr', (continued)
- [PULL 31/67] target/ppc: Introduce 'PowerPCCPUClass::spapr_logical_pvr', Nicholas Piggin, 2024/11/03
- [PULL 32/67] target/ppc: Fix regression due to Power10 and Power11 having same PCR, Nicholas Piggin, 2024/11/03
- [PULL 33/67] target/ppc: Add Power11 DD2.0 processor, Nicholas Piggin, 2024/11/03
- [PULL 34/67] ppc/pseries: Add Power11 cpu type, Nicholas Piggin, 2024/11/03
- [PULL 35/67] target/ppc: use locally stored msr and avoid indirect access, Nicholas Piggin, 2024/11/03
- [PULL 36/67] target/ppc: optimize hreg_compute_pmu_hflags_value, Nicholas Piggin, 2024/11/03
- [PULL 37/67] target/ppc: optimize hreg_compute_pmu_hflags_value, Nicholas Piggin, 2024/11/03
- [PULL 38/67] target/ppc: optimize p9 exception handling routines, Nicholas Piggin, 2024/11/03
- [PULL 39/67] target/ppc: optimize p8 exception handling routines, Nicholas Piggin, 2024/11/03
- [PULL 40/67] target/ppc: optimize p7 exception handling routines, Nicholas Piggin, 2024/11/03
- [PULL 42/67] target/ppc: combine multiple ail checks into one,
Nicholas Piggin <=
- [PULL 43/67] target/ppc: reduce duplicate code between init_proc_POWER{9, 10}, Nicholas Piggin, 2024/11/03
- [PULL 46/67] hw/ppc: Implement -dtb support for PowerNV, Nicholas Piggin, 2024/11/03
- [PULL 45/67] spapr: nested: Add Power11 capability support for Nested PAPR guests in TCG L0, Nicholas Piggin, 2024/11/03
- [PULL 41/67] target/ppc: simplify var usage in ppc_next_unmasked_interrupt, Nicholas Piggin, 2024/11/03
- [PULL 48/67] pnv/xive: TIMA patch sets pre-req alignment and formatting changes, Nicholas Piggin, 2024/11/03
- [PULL 47/67] ppc/xive: Fix ESB length overflow on 32-bit hosts, Nicholas Piggin, 2024/11/03
- [PULL 49/67] pnv/xive2: Define OGEN field in the TIMA, Nicholas Piggin, 2024/11/03
- [PULL 51/67] pnv/xive2: Support for "OS LGS Push" TIMA operation, Nicholas Piggin, 2024/11/03
- [PULL 50/67] ppc/xive2: Support TIMA "Pull OS Context to Odd Thread Reporting Line", Nicholas Piggin, 2024/11/03
- [PULL 52/67] ppc/xive2: Dump more NVP state with 'info pic', Nicholas Piggin, 2024/11/03