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[PULL 49/67] pnv/xive2: Define OGEN field in the TIMA
From: |
Nicholas Piggin |
Subject: |
[PULL 49/67] pnv/xive2: Define OGEN field in the TIMA |
Date: |
Mon, 4 Nov 2024 10:18:38 +1000 |
From: Frederic Barrat <fbarrat@linux.ibm.com>
The OGEN field at offset 0x1F is a new field for Gen2 TIMA. This
patch defines it.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Kowal <kowal@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/intc/xive.c | 4 ++++
include/hw/ppc/xive_regs.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index dc86a7a3be..0e81678ab3 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -742,6 +742,10 @@ void xive_tctx_reset(XiveTCTX *tctx)
tctx->regs[TM_QW1_OS + TM_LSMFB] = 0xFF;
tctx->regs[TM_QW1_OS + TM_ACK_CNT] = 0xFF;
tctx->regs[TM_QW1_OS + TM_AGE] = 0xFF;
+ if (!(xive_presenter_get_config(tctx->xptr) &
+ XIVE_PRESENTER_GEN1_TIMA_OS)) {
+ tctx->regs[TM_QW1_OS + TM_OGEN] = 2;
+ }
/*
* Initialize PIPR to 0xFF to avoid phantom interrupts when the
diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
index 9d52d464d9..9062c6abf6 100644
--- a/include/hw/ppc/xive_regs.h
+++ b/include/hw/ppc/xive_regs.h
@@ -79,6 +79,7 @@
#define TM_INC 0x5 /* - + - + */
#define TM_AGE 0x6 /* - + - + */
#define TM_PIPR 0x7 /* - + - + */
+#define TM_OGEN 0xF /* - + - - */ /* P10 only */
#define TM_WORD0 0x0
#define TM_WORD1 0x4
--
2.45.2
- [PULL 38/67] target/ppc: optimize p9 exception handling routines, (continued)
- [PULL 38/67] target/ppc: optimize p9 exception handling routines, Nicholas Piggin, 2024/11/03
- [PULL 39/67] target/ppc: optimize p8 exception handling routines, Nicholas Piggin, 2024/11/03
- [PULL 40/67] target/ppc: optimize p7 exception handling routines, Nicholas Piggin, 2024/11/03
- [PULL 42/67] target/ppc: combine multiple ail checks into one, Nicholas Piggin, 2024/11/03
- [PULL 43/67] target/ppc: reduce duplicate code between init_proc_POWER{9, 10}, Nicholas Piggin, 2024/11/03
- [PULL 46/67] hw/ppc: Implement -dtb support for PowerNV, Nicholas Piggin, 2024/11/03
- [PULL 45/67] spapr: nested: Add Power11 capability support for Nested PAPR guests in TCG L0, Nicholas Piggin, 2024/11/03
- [PULL 41/67] target/ppc: simplify var usage in ppc_next_unmasked_interrupt, Nicholas Piggin, 2024/11/03
- [PULL 48/67] pnv/xive: TIMA patch sets pre-req alignment and formatting changes, Nicholas Piggin, 2024/11/03
- [PULL 47/67] ppc/xive: Fix ESB length overflow on 32-bit hosts, Nicholas Piggin, 2024/11/03
- [PULL 49/67] pnv/xive2: Define OGEN field in the TIMA,
Nicholas Piggin <=
- [PULL 51/67] pnv/xive2: Support for "OS LGS Push" TIMA operation, Nicholas Piggin, 2024/11/03
- [PULL 50/67] ppc/xive2: Support TIMA "Pull OS Context to Odd Thread Reporting Line", Nicholas Piggin, 2024/11/03
- [PULL 52/67] ppc/xive2: Dump more NVP state with 'info pic', Nicholas Piggin, 2024/11/03
- [PULL 57/67] ppc/xive2: Support "Pull Thread Context to Odd Thread Reporting Line", Nicholas Piggin, 2024/11/03
- [PULL 44/67] spapr: nested: Add support for DPDES SPR in GSB for TCG L0, Nicholas Piggin, 2024/11/03
- [PULL 54/67] ppc/xive2: Allow 1-byte write of Target field in TIMA, Nicholas Piggin, 2024/11/03
- [PULL 59/67] pnv/xive: Update PIPR when updating CPPR, Nicholas Piggin, 2024/11/03
- [PULL 60/67] pnv/xive2: TIMA support for 8-byte OS context push for PHYP, Nicholas Piggin, 2024/11/03
- [PULL 61/67] pnv/xive2: TIMA CI ops using alternative offsets or byte lengths, Nicholas Piggin, 2024/11/03
- [PULL 53/67] ppc/xive2: Dump the VP-group and crowd tables with 'info pic', Nicholas Piggin, 2024/11/03