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[PATCH v3 08/19] target/riscv: handle mvendorid/marchid/mimpid for KVM C
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v3 08/19] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs |
Date: |
Thu, 22 Jun 2023 10:56:49 -0300 |
After changing user validation for mvendorid/marchid/mimpid to guarantee
that the value is validated on user input time, coupled with the work in
fetching KVM default values for them by using a scratch CPU, we're
certain that the values in cpu->cfg.(mvendorid|marchid|mimpid) are
already good to be written back to KVM.
There's no need to write the values back for 'host' type CPUs since the
values can't be changed, so let's do that just for generic CPUs.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/kvm.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index cd2974c663..602727cdfd 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -495,6 +495,33 @@ void kvm_arch_init_irq_routing(KVMState *s)
{
}
+static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, CPUState *cs)
+{
+ CPURISCVState *env = &cpu->env;
+ uint64_t id;
+ int ret;
+
+ id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
+ KVM_REG_RISCV_CONFIG_REG(mvendorid));
+ ret = kvm_set_one_reg(cs, id, &cpu->cfg.mvendorid);
+ if (ret != 0) {
+ return ret;
+ }
+
+ id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
+ KVM_REG_RISCV_CONFIG_REG(marchid));
+ ret = kvm_set_one_reg(cs, id, &cpu->cfg.marchid);
+ if (ret != 0) {
+ return ret;
+ }
+
+ id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
+ KVM_REG_RISCV_CONFIG_REG(mimpid));
+ ret = kvm_set_one_reg(cs, id, &cpu->cfg.mimpid);
+
+ return ret;
+}
+
int kvm_arch_init_vcpu(CPUState *cs)
{
int ret = 0;
@@ -513,6 +540,10 @@ int kvm_arch_init_vcpu(CPUState *cs)
}
env->misa_ext = isa;
+ if (!object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) {
+ ret = kvm_vcpu_set_machine_ids(cpu, cs);
+ }
+
return ret;
}
--
2.41.0
- [PATCH v3 00/19] target/riscv, KVM: fixes and enhancements, Daniel Henrique Barboza, 2023/06/22
- [PATCH v3 01/19] target/riscv: skip features setup for KVM CPUs, Daniel Henrique Barboza, 2023/06/22
- [PATCH v3 02/19] hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set, Daniel Henrique Barboza, 2023/06/22
- [PATCH v3 03/19] target/riscv/cpu.c: restrict 'mvendorid' value, Daniel Henrique Barboza, 2023/06/22
- [PATCH v3 04/19] target/riscv/cpu.c: restrict 'mimpid' value, Daniel Henrique Barboza, 2023/06/22
- [PATCH v3 08/19] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs,
Daniel Henrique Barboza <=
- [PATCH v3 05/19] target/riscv/cpu.c: restrict 'marchid' value, Daniel Henrique Barboza, 2023/06/22
- [PATCH v3 10/19] target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU, Daniel Henrique Barboza, 2023/06/22
- [PATCH v3 07/19] target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids(), Daniel Henrique Barboza, 2023/06/22
- [PATCH v3 13/19] target/riscv/kvm.c: update KVM MISA bits, Daniel Henrique Barboza, 2023/06/22
- [PATCH v3 12/19] target/riscv: add KVM specific MISA properties, Daniel Henrique Barboza, 2023/06/22
- Re: [PATCH v3 12/19] target/riscv: add KVM specific MISA properties, Andrew Jones, 2023/06/26