qemu-riscv
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: Can I utilize the RISC-V vector extension with QEMU?


From: Daniel Henrique Barboza
Subject: Re: Can I utilize the RISC-V vector extension with QEMU?
Date: Mon, 17 Jun 2024 10:12:28 -0300
User-agent: Mozilla Thunderbird

Hi!
On 6/13/24 9:41 PM, bithamr wrote:
Hello!

For the last few days I've been trying to see if it's possible to run a RISC-V 
QEMU instance that has v1.0 vector extension enabled:

https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc


To enable vector you need to add the option 'v=true' when declaring the
CPU. For both qemu-system-riscv64 and qemu-riscv64, this command line would
enable the Vector extension:

$ qemu-system-riscv64 -M virt -cpu rv64,v=true
$ qemu-riscv64 -cpu rv64,v=true

'-cpu rv64' is the default CPU QEMU users for RISC-V 64 bits. With this option
you'll add Vector support to the default CPU.

Depending on the QEMU version you're using you'll also have a 'max' CPU
type that will enable (almost) all extensions that QEMU implements,
including Vector.



I found the following documentation:

https://wiki.qemu.org/Documentation/Platforms/RISCV
https://www.qemu.org/docs/master/system/target-riscv.html

In that documentation it references extensions, and how some of them might be enabled 
with "-x", so it seems like it might be possible? But overall between both the 
wiki and the documentation is was unclear if any of the virtual CPUs present in qemu 
today actually support the vector extensions (and if so how to enable that).

The "x-" in an extension/option name means that the extension is being added
in an experimental state, most likely to allow for early development of other
parts of the SW stack (kernel, toolchain, etc). When the spec is at least on
'frozen' we remove the 'x-' from the name.

As for the docs, yeah ... we're missing a scalable way of displaying all
available extensions a CPU has. We have a dozen extensions added in QEMU
every release and that would be nice to have. We had some efforts in that
area in the past and hopefully we'll get back to them soon.


Thanks,

Daniel




What I have so far is a copy of Fedora running in a RISC-V virtual machine for 
testing. I found the following virtual CPUs come packaged in with 
qemu-riscv64-static:

```
rv64
shakti-c
sifive-e51
sifive-u54
thead-c906
veyron-v1
x-rv128
```

However I have started the virtual machine up with each of these CPUs and 
tested them using the following program:

```
.section .text
.global _start

_start:
     vsetvli x0, x0, e8, m1
     li a7, 93
     li a0, 0
     ecall
```

Each of them returns the following:

```
$ as -o check.o check.s
check.s:5: Error: unrecognized opcode `vsetvli x0,x0,e8,m1', extension `v' or 
`zve64x' or `zve32x' required
```

I'm kinda getting stuck so I thought maybe it was time to reach out for some 
help, I really appreciate any you can provide: can I, and then HOW can I run a 
RISC-V qemu instance that has the vector extension present?

Thank you!



reply via email to

[Prev in Thread] Current Thread [Next in Thread]