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Re: [PATCH] target/riscv: fix za64rs enabling


From: Alistair Francis
Subject: Re: [PATCH] target/riscv: fix za64rs enabling
Date: Mon, 26 Aug 2024 10:15:38 +1000

On Fri, Aug 23, 2024 at 4:39 PM Vladimir Isaev
<vladimir.isaev@syntacore.com> wrote:
>
> za64rs requires priv 1.12 when enabled by priv 1.11.
>
> This fixes annoying warning:
> warning: disabling za64rs extension for hart 0x00000000 because privilege 
> spec version does not match
>
> on priv 1.11 CPUs.
>
> Fixes: 68c9e54beae8 ("target/riscv: do not enable all named features by 
> default")
> Signed-off-by: Vladimir Isaev <vladimir.isaev@syntacore.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index a90808a3bace..07a7af59b6d9 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -115,7 +115,7 @@ const RISCVIsaExtData isa_edata_arr[] = {
>      ISA_EXT_DATA_ENTRY(zihpm, PRIV_VERSION_1_12_0, ext_zihpm),
>      ISA_EXT_DATA_ENTRY(zimop, PRIV_VERSION_1_13_0, ext_zimop),
>      ISA_EXT_DATA_ENTRY(zmmul, PRIV_VERSION_1_12_0, ext_zmmul),
> -    ISA_EXT_DATA_ENTRY(za64rs, PRIV_VERSION_1_12_0, has_priv_1_11),
> +    ISA_EXT_DATA_ENTRY(za64rs, PRIV_VERSION_1_12_0, has_priv_1_12),
>      ISA_EXT_DATA_ENTRY(zaamo, PRIV_VERSION_1_12_0, ext_zaamo),
>      ISA_EXT_DATA_ENTRY(zabha, PRIV_VERSION_1_13_0, ext_zabha),
>      ISA_EXT_DATA_ENTRY(zacas, PRIV_VERSION_1_12_0, ext_zacas),
> --
> 2.45.2
>
>



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