qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 05/15] target-tricore: Add masks and opcodes for


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH 05/15] target-tricore: Add masks and opcodes for decoding
Date: Mon, 07 Jul 2014 12:37:31 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.6.0

On 07/07/2014 11:13 AM, Bastian Koppelmann wrote:
> +/* This creates a mask with bits start .. end set to 1 and applies it to op 
> */
> +#define MASK_BITS(op, start, end) (op & (((1 << (end-start+1)) - 1) << 
> start))

This is extract32(op, (start), (end) - (start)) << (start)

Do you ever use the unshifted bits, and if so, why?

> +#define MASK_BITS_SHIFT(op, start, end) (MASK_BITS(op, start, end) >> start)

This is extract32(op, (start), (end) - (start))

I note that quite a few times within the later patch you actually sign-extend
this result, duplicating the field width all over the place.  It might be
better to just use sextract32 as required in the first place to treat the
fields that ought to be sign-extended as sign-extended.


r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]