[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v4 03/26] RISC-V: Make virt board description match
From: |
Michael Clark |
Subject: |
[Qemu-devel] [PATCH v4 03/26] RISC-V: Make virt board description match spike |
Date: |
Mon, 19 Mar 2018 14:18:26 -0700 |
This makes 'qemu-system-riscv64 -machine help' output more tidy
and consistent.
Cc: Sagar Karandikar <address@hidden>
Cc: Bastian Koppelmann <address@hidden>
Signed-off-by: Michael Clark <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
---
hw/riscv/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index a402856..0055439 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -404,7 +404,7 @@ static const TypeInfo riscv_virt_board_device = {
static void riscv_virt_board_machine_init(MachineClass *mc)
{
- mc->desc = "RISC-V VirtIO Board (Privileged spec v1.10)";
+ mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)";
mc->init = riscv_virt_board_init;
mc->max_cpus = 8; /* hardcoded limit in BBL */
}
--
2.7.0
- [Qemu-devel] [PATCH v4 00/26] RISC-V Post-merge spec conformance and cleanup, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 01/26] RISC-V: Make virt create_fdt interface consistent, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 05/26] RISC-V: Remove identity_translate from load_elf, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 04/26] RISC-V: Use ROM base address and size from memmap, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 06/26] RISC-V: Mark ROM read-only after copying in code, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 08/26] RISC-V: Make sure rom has space for fdt, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 02/26] RISC-V: Replace hardcoded constants with enum values, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 03/26] RISC-V: Make virt board description match spike,
Michael Clark <=
- [Qemu-devel] [PATCH v4 10/26] RISC-V: Hold rcu_read_lock when accessing memory, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 09/26] RISC-V: Include intruction hex in disassembly, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 07/26] RISC-V: Remove unused class definitions, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 12/26] RISC-V: Update E order and I extension order, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 13/26] RISC-V: Make some header guards more specific, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 16/26] RISC-V: Remove EM_RISCV ELF_MACHINE indirection, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 11/26] RISC-V: Improve page table walker spec compliance, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 17/26] RISC-V: Hardwire satp to 0 for no-mmu case, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 14/26] RISC-V: Make virt header comment title consistent, Michael Clark, 2018/03/19
- [Qemu-devel] [PATCH v4 24/26] RISC-V: Clear mtval/stval on exceptions without info, Michael Clark, 2018/03/19