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Re: [Qemu-arm] [Qemu-devel] [PATCH v2 13/32] arm/translate-a64: add FP16
From: |
Richard Henderson |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH v2 13/32] arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16 |
Date: |
Thu, 8 Feb 2018 12:59:49 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 |
On 02/08/2018 09:31 AM, Alex Bennée wrote:
> Signed-off-by: Alex Bennée <address@hidden>
> ---
> target/arm/helper-a64.c | 34 ++++++++++++++++++++++++++++++++++
> target/arm/helper-a64.h | 2 ++
> target/arm/translate-a64.c | 6 ++++++
> 3 files changed, 42 insertions(+)
>
> diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
> index bdfcac111f..6358b42472 100644
> --- a/target/arm/helper-a64.c
> +++ b/target/arm/helper-a64.c
> @@ -192,6 +192,10 @@ uint64_t HELPER(neon_cgt_f64)(float64 a, float64 b, void
> *fpstp)
> * versions, these do a fully fused multiply-add or
> * multiply-add-and-halve.
> */
> +#define float16_two make_float16(0x4000)
> +#define float16_three make_float16(0x4200)
> +#define float16_one_point_five make_float16(0x3e00)
> +
> #define float32_two make_float32(0x40000000)
> #define float32_three make_float32(0x40400000)
> #define float32_one_point_five make_float32(0x3fc00000)
I think we should move these somewhere else, some header
where we don't have to keep re-defining them in various
files within target/arm.
I know, for instance, that I need floatN_two in translate-sve.c.
Just putting them in softfloat.h is probably best.
Otherwise,
Reviewed-by: Richard Henderson <address@hidden>
r~
- Re: [Qemu-arm] [Qemu-devel] [PATCH v2 11/32] arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16, (continued)
[Qemu-arm] [PATCH v2 09/32] arm/translate-a64: initial decode for simd_three_reg_same_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 07/32] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV), Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 12/32] arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 13/32] arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16, Alex Bennée, 2018/02/08
- Re: [Qemu-arm] [Qemu-devel] [PATCH v2 13/32] arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16,
Richard Henderson <=
[Qemu-arm] [PATCH v2 24/32] arm/translate-a64: add FP16 FRECPE, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 20/32] arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 26/32] arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 31/32] arm/translate-a64: implement simd_scalar_three_reg_same_fp16, Alex Bennée, 2018/02/08