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Re: [Qemu-arm] [Qemu-devel] [PATCH v2 11/32] arm/translate-a64: add FP16
From: |
Richard Henderson |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH v2 11/32] arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16 |
Date: |
Fri, 23 Feb 2018 14:10:28 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 |
On 02/23/2018 03:59 AM, Alex Bennée wrote:
>> Not using float16_eq etc?
>
> These don't actually exist.
Ah.
> But I guess we could make stubs for them
> based on the generic float_compare support. But would it buy us much?
...
>>> + return ADVSIMD_CMPRES(compare == float_relation_greater ||
>>> + compare == float_relation_equal);
>>
>> Especially float16_le(b, a, fpst).
It buys us knowledge of the float_relation_* values, such that instead of the
two comparisons above you can use <= 0 (note that this only works for le not
ge, because of float_relation_unordered == 2).
I'll grant you that two compares vs one isn't much, but it is simpler...
r~
- Re: [Qemu-arm] [Qemu-devel] [PATCH v2 06/32] target/arm/helper: pass explicit fpst to set_rmode, (continued)
- [Qemu-arm] [PATCH v2 09/32] arm/translate-a64: initial decode for simd_three_reg_same_fp16, Alex Bennée, 2018/02/08
- [Qemu-arm] [PATCH v2 07/32] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV), Alex Bennée, 2018/02/08
- [Qemu-arm] [PATCH v2 12/32] arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16, Alex Bennée, 2018/02/08
- [Qemu-arm] [PATCH v2 13/32] arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16, Alex Bennée, 2018/02/08
- [Qemu-arm] [PATCH v2 24/32] arm/translate-a64: add FP16 FRECPE, Alex Bennée, 2018/02/08