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Re: [PATCH 04/13] target/arm: Factor out PMU register definitions
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH 04/13] target/arm: Factor out PMU register definitions |
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Date: |
Tue, 11 Feb 2020 10:30:45 -0800 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 |
On 2/11/20 9:37 AM, Peter Maydell wrote:
> Pull the code that defines the various PMU registers out
> into its own function, matching the pattern we have
> already for the debug registers.
>
> Apart from one style fix to a multi-line comment, this
> is purely movement of code with no changes to it.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target/arm/helper.c | 158 +++++++++++++++++++++++---------------------
> 1 file changed, 82 insertions(+), 76 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- Re: [PATCH 06/13] target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field, (continued)
- [PATCH 05/13] target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1, Peter Maydell, 2020/02/11
- [PATCH 09/13] target/arm: Implement ARMv8.1-PMU extension, Peter Maydell, 2020/02/11
- [PATCH 13/13] target/arm: Correct handling of PMCR_EL0.LC bit, Peter Maydell, 2020/02/11
- [PATCH 04/13] target/arm: Factor out PMU register definitions, Peter Maydell, 2020/02/11
- [PATCH 10/13] target/arm: Implement ARMv8.4-PMU extension, Peter Maydell, 2020/02/11
- [PATCH 07/13] target/arm: Define an aa32_pmu_8_1 isar feature test function, Peter Maydell, 2020/02/11
- [PATCH 08/13] target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checks, Peter Maydell, 2020/02/11
- [PATCH 12/13] target/arm: Correct definition of PMCRDP, Peter Maydell, 2020/02/11