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[RFC v3 52/71] target/riscv: rvv-1.0: floating-point compare instruction
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From: |
frank . chang |
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Subject: |
[RFC v3 52/71] target/riscv: rvv-1.0: floating-point compare instructions |
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Date: |
Thu, 6 Aug 2020 18:46:49 +0800 |
From: Frank Chang <frank.chang@sifive.com>
Clear tail elements only if VTA is agnostic.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
---
target/riscv/vector_helper.c | 42 +++++++++++++++---------------------
1 file changed, 17 insertions(+), 25 deletions(-)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index ffcf8d2df99..d8aa0825647 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -3975,27 +3975,23 @@ GEN_VEXT_VF(vfsgnjx_vf_w, 4, 4)
GEN_VEXT_VF(vfsgnjx_vf_d, 8, 8)
/* Vector Floating-Point Compare Instructions */
-#define GEN_VEXT_CMP_VV_ENV(NAME, ETYPE, H, DO_OP) \
-void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \
- CPURISCVState *env, uint32_t desc) \
-{ \
- uint32_t vm = vext_vm(desc); \
- uint32_t vl = env->vl; \
- uint32_t vlmax = vext_maxsz(desc) / sizeof(ETYPE); \
- uint32_t i; \
- \
- for (i = 0; i < vl; i++) { \
- ETYPE s1 = *((ETYPE *)vs1 + H(i)); \
- ETYPE s2 = *((ETYPE *)vs2 + H(i)); \
- if (!vm && !vext_elem_mask(v0, i)) { \
- continue; \
- } \
- vext_set_elem_mask(vd, i, \
- DO_OP(s2, s1, &env->fp_status)); \
- } \
- for (; i < vlmax; i++) { \
- vext_set_elem_mask(vd, i, 0); \
- } \
+#define GEN_VEXT_CMP_VV_ENV(NAME, ETYPE, H, DO_OP) \
+void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \
+ CPURISCVState *env, uint32_t desc) \
+{ \
+ uint32_t vm = vext_vm(desc); \
+ uint32_t vl = env->vl; \
+ uint32_t i; \
+ \
+ for (i = 0; i < vl; i++) { \
+ ETYPE s1 = *((ETYPE *)vs1 + H(i)); \
+ ETYPE s2 = *((ETYPE *)vs2 + H(i)); \
+ if (!vm && !vext_elem_mask(v0, i)) { \
+ continue; \
+ } \
+ vext_set_elem_mask(vd, i, \
+ DO_OP(s2, s1, &env->fp_status)); \
+ } \
}
GEN_VEXT_CMP_VV_ENV(vmfeq_vv_h, uint16_t, H2, float16_eq_quiet)
@@ -4008,7 +4004,6 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1, void
*vs2, \
{ \
uint32_t vm = vext_vm(desc); \
uint32_t vl = env->vl; \
- uint32_t vlmax = vext_max_elems(desc, sizeof(ETYPE), false); \
uint32_t i; \
\
for (i = 0; i < vl; i++) { \
@@ -4019,9 +4014,6 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1, void
*vs2, \
vext_set_elem_mask(vd, i, \
DO_OP(s2, (ETYPE)s1, &env->fp_status)); \
} \
- for (; i < vlmax; i++) { \
- vext_set_elem_mask(vd, i, 0); \
- } \
}
GEN_VEXT_CMP_VF(vmfeq_vf_h, uint16_t, H2, float16_eq_quiet)
--
2.17.1
- [RFC v3 42/71] target/riscv: rvv-1.0: single-width averaging add and subtract instructions, (continued)
- [RFC v3 42/71] target/riscv: rvv-1.0: single-width averaging add and subtract instructions, frank . chang, 2020/08/06
- [RFC v3 43/71] target/riscv: rvv-1.0: single-width bit shift instructions, frank . chang, 2020/08/06
- [RFC v3 44/71] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow, frank . chang, 2020/08/06
- [RFC v3 45/71] target/riscv: rvv-1.0: narrowing integer right shift instructions, frank . chang, 2020/08/06
- [RFC v3 46/71] target/riscv: rvv-1.0: widening integer multiply-add instructions, frank . chang, 2020/08/06
- [RFC v3 47/71] target/riscv: rvv-1.0: add Zvqmac extension, frank . chang, 2020/08/06
- [RFC v3 48/71] target/riscv: rvv-1.0: quad-widening integer multiply-add instructions, frank . chang, 2020/08/06
- [RFC v3 49/71] target/riscv: rvv-1.0: single-width saturating add and subtract instructions, frank . chang, 2020/08/06
- [RFC v3 51/71] target/riscv: use softfloat lib float16 comparison functions, frank . chang, 2020/08/06
- [RFC v3 50/71] target/riscv: rvv-1.0: integer comparison instructions, frank . chang, 2020/08/06
- [RFC v3 52/71] target/riscv: rvv-1.0: floating-point compare instructions,
frank . chang <=
- [RFC v3 53/71] target/riscv: rvv-1.0: mask-register logical instructions, frank . chang, 2020/08/06
- [RFC v3 54/71] target/riscv: rvv-1.0: slide instructions, frank . chang, 2020/08/06
- [RFC v3 55/71] target/riscv: rvv-1.0: floating-point slide instructions, frank . chang, 2020/08/06
- [RFC v3 56/71] target/riscv: rvv-1.0: narrowing fixed-point clip instructions, frank . chang, 2020/08/06
- [RFC v3 57/71] target/riscv: rvv-1.0: single-width floating-point reduction, frank . chang, 2020/08/06
- [RFC v3 58/71] target/riscv: rvv-1.0: widening floating-point reduction instructions, frank . chang, 2020/08/06
- [RFC v3 59/71] target/riscv: rvv-1.0: single-width scaling shift instructions, frank . chang, 2020/08/06
- [RFC v3 60/71] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add, frank . chang, 2020/08/06
- [RFC v3 61/71] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf, frank . chang, 2020/08/06
- [RFC v3 62/71] target/riscv: rvv-1.0: remove integer extract instruction, frank . chang, 2020/08/06