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[PULL v2 08/45] hw/riscv/opentitan: add aon_timer base unimpl
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From: |
Alistair Francis |
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Subject: |
[PULL v2 08/45] hw/riscv/opentitan: add aon_timer base unimpl |
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Date: |
Thu, 22 Dec 2022 08:39:45 +1000 |
From: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Adds the updated `aon_timer` base as an unimplemented device. This is
used by TockOS, patch ensures the guest doesn't hit load faults.
Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20221025043335.339815-3-wilfred.mallawa@opensource.wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
include/hw/riscv/opentitan.h | 1 +
hw/riscv/opentitan.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
index 1fc055cdff..7659d1bc5b 100644
--- a/include/hw/riscv/opentitan.h
+++ b/include/hw/riscv/opentitan.h
@@ -81,6 +81,7 @@ enum {
IBEX_DEV_RSTMGR,
IBEX_DEV_CLKMGR,
IBEX_DEV_PINMUX,
+ IBEX_DEV_AON_TIMER,
IBEX_DEV_USBDEV,
IBEX_DEV_FLASH_CTRL,
IBEX_DEV_PLIC,
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 92493c629d..78f895d773 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -56,6 +56,7 @@ static const MemMapEntry ibex_memmap[] = {
[IBEX_DEV_RSTMGR] = { 0x40410000, 0x1000 },
[IBEX_DEV_CLKMGR] = { 0x40420000, 0x1000 },
[IBEX_DEV_PINMUX] = { 0x40460000, 0x1000 },
+ [IBEX_DEV_AON_TIMER] = { 0x40470000, 0x1000 },
[IBEX_DEV_SENSOR_CTRL] = { 0x40490000, 0x1000 },
[IBEX_DEV_FLASH_CTRL] = { 0x41000000, 0x1000 },
[IBEX_DEV_AES] = { 0x41100000, 0x1000 },
@@ -272,6 +273,8 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc,
Error **errp)
memmap[IBEX_DEV_CLKMGR].base, memmap[IBEX_DEV_CLKMGR].size);
create_unimplemented_device("riscv.lowrisc.ibex.pinmux",
memmap[IBEX_DEV_PINMUX].base, memmap[IBEX_DEV_PINMUX].size);
+ create_unimplemented_device("riscv.lowrisc.ibex.aon_timer",
+ memmap[IBEX_DEV_AON_TIMER].base, memmap[IBEX_DEV_AON_TIMER].size);
create_unimplemented_device("riscv.lowrisc.ibex.usbdev",
memmap[IBEX_DEV_USBDEV].base, memmap[IBEX_DEV_USBDEV].size);
create_unimplemented_device("riscv.lowrisc.ibex.flash_ctrl",
--
2.38.1
- [PULL v2 00/45] riscv-to-apply queue, Alistair Francis, 2022/12/21
- [PULL v2 02/45] hw/registerfields: add `FIELDx_1CLEAR()` macro, Alistair Francis, 2022/12/21
- [PULL v2 01/45] target/riscv: Fix PMP propagation for tlb, Alistair Francis, 2022/12/21
- [PULL v2 05/45] tcg/riscv: Fix reg overlap case in tcg_out_addsub2, Alistair Francis, 2022/12/21
- [PULL v2 03/45] hw/ssi/ibex_spi: implement `FIELD32_1CLEAR` macro, Alistair Francis, 2022/12/21
- [PULL v2 04/45] tcg/riscv: Fix range matched by TCG_CT_CONST_M12, Alistair Francis, 2022/12/21
- [PULL v2 08/45] hw/riscv/opentitan: add aon_timer base unimpl,
Alistair Francis <=
- [PULL v2 06/45] tcg/riscv: Fix base register for user-only qemu_ld/st, Alistair Francis, 2022/12/21
- [PULL v2 07/45] hw/riscv/opentitan: bump opentitan, Alistair Francis, 2022/12/21
- [PULL v2 10/45] target/riscv: smstateen check for h/s/envcfg, Alistair Francis, 2022/12/21
- [PULL v2 09/45] target/riscv: Add smstateen support, Alistair Francis, 2022/12/21
- [PULL v2 11/45] target/riscv: generate virtual instruction exception, Alistair Francis, 2022/12/21
- [PULL v2 13/45] target/riscv: Add itrigger support when icount is enabled, Alistair Francis, 2022/12/21
- [PULL v2 12/45] target/riscv: Add itrigger support when icount is not enabled, Alistair Francis, 2022/12/21
- [PULL v2 14/45] target/riscv: Enable native debug itrigger, Alistair Francis, 2022/12/21
- [PULL v2 15/45] target/riscv: Add itrigger_enabled field to CPURISCVState, Alistair Francis, 2022/12/21
- [PULL v2 16/45] hw/intc: sifive_plic: Renumber the S irqs for numa support, Alistair Francis, 2022/12/21