[RFC PATCH 33/43] target/loongarch: Implement vfrstp

[Song Gao]

This patch includes:
- VFRSTP[I].{B/H}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/disas.c                    |  5 ++
 target/loongarch/helper.h                   |  5 ++
 target/loongarch/insn_trans/trans_lsx.c.inc |  5 ++
 target/loongarch/insns.decode               |  5 ++
 target/loongarch/lsx_helper.c               | 70 +++++++++++++++++++++
 5 files changed, 90 insertions(+)

diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index 7212f86eb0..ffcaf06136 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -1268,3 +1268,8 @@ INSN_LSX(vbitrevi_b,       vv_i)
 INSN_LSX(vbitrevi_h,       vv_i)
 INSN_LSX(vbitrevi_w,       vv_i)
 INSN_LSX(vbitrevi_d,       vv_i)
+
+INSN_LSX(vfrstp_b,         vvv)
+INSN_LSX(vfrstp_h,         vvv)
+INSN_LSX(vfrstpi_b,        vv_i)
+INSN_LSX(vfrstpi_h,        vv_i)
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index d1983d9404..781a544622 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -623,3 +623,8 @@ DEF_HELPER_4(vbitrevi_b, void, env, i32, i32, i32)
 DEF_HELPER_4(vbitrevi_h, void, env, i32, i32, i32)
 DEF_HELPER_4(vbitrevi_w, void, env, i32, i32, i32)
 DEF_HELPER_4(vbitrevi_d, void, env, i32, i32, i32)
+
+DEF_HELPER_4(vfrstp_b, void, env, i32, i32, i32)
+DEF_HELPER_4(vfrstp_h, void, env, i32, i32, i32)
+DEF_HELPER_4(vfrstpi_b, void, env, i32, i32, i32)
+DEF_HELPER_4(vfrstpi_h, void, env, i32, i32, i32)
diff --git a/target/loongarch/insn_trans/trans_lsx.c.inc 
b/target/loongarch/insn_trans/trans_lsx.c.inc
index 141d7474dc..ffa281e717 100644
--- a/target/loongarch/insn_trans/trans_lsx.c.inc
+++ b/target/loongarch/insn_trans/trans_lsx.c.inc
@@ -539,3 +539,8 @@ TRANS(vbitrevi_b, gen_vv_i, gen_helper_vbitrevi_b)
 TRANS(vbitrevi_h, gen_vv_i, gen_helper_vbitrevi_h)
 TRANS(vbitrevi_w, gen_vv_i, gen_helper_vbitrevi_w)
 TRANS(vbitrevi_d, gen_vv_i, gen_helper_vbitrevi_d)
+
+TRANS(vfrstp_b, gen_vvv, gen_helper_vfrstp_b)
+TRANS(vfrstp_h, gen_vvv, gen_helper_vfrstp_h)
+TRANS(vfrstpi_b, gen_vv_i, gen_helper_vfrstpi_b)
+TRANS(vfrstpi_h, gen_vv_i, gen_helper_vfrstpi_h)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index 74667ae6e0..f537f726a2 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -997,3 +997,8 @@ vbitrevi_b       0111 00110001 10000 01 ... ..... .....   
@vv_ui3
 vbitrevi_h       0111 00110001 10000 1 .... ..... .....   @vv_ui4
 vbitrevi_w       0111 00110001 10001 ..... ..... .....    @vv_ui5
 vbitrevi_d       0111 00110001 1001 ...... ..... .....    @vv_ui6
+
+vfrstp_b         0111 00010010 10110 ..... ..... .....    @vvv
+vfrstp_h         0111 00010010 10111 ..... ..... .....    @vvv
+vfrstpi_b        0111 00101001 10100 ..... ..... .....    @vv_ui5
+vfrstpi_h        0111 00101001 10101 ..... ..... .....    @vv_ui5
diff --git a/target/loongarch/lsx_helper.c b/target/loongarch/lsx_helper.c
index f88719908a..31e9270826 100644
--- a/target/loongarch/lsx_helper.c
+++ b/target/loongarch/lsx_helper.c
@@ -3398,3 +3398,73 @@ DO_HELPER_VV_I(vbitrevi_b, 8, helper_vv_i, do_vbitrev_i)
 DO_HELPER_VV_I(vbitrevi_h, 16, helper_vv_i, do_vbitrev_i)
 DO_HELPER_VV_I(vbitrevi_w, 32, helper_vv_i, do_vbitrev_i)
 DO_HELPER_VV_I(vbitrevi_d, 64, helper_vv_i, do_vbitrev_i)
+
+void helper_vfrstp_b(CPULoongArchState *env,
+                     uint32_t vd, uint32_t vj, uint32_t vk)
+{
+    vec_t *Vd = &(env->fpr[vd].vec);
+    vec_t *Vj = &(env->fpr[vj].vec);
+    vec_t *Vk = &(env->fpr[vk].vec);
+
+    int i;
+    int m;
+    for (i = 0; i < 128/8; i++) {
+        if (Vj->B[i] < 0) {
+            break;
+        }
+    }
+    m = Vk->B[0] % 16;
+    Vd->B[m] = (int8_t)i;
+}
+
+void helper_vfrstp_h(CPULoongArchState *env,
+                     uint32_t vd, uint32_t vj, uint32_t vk)
+{
+    vec_t *Vd = &(env->fpr[vd].vec);
+    vec_t *Vj = &(env->fpr[vj].vec);
+    vec_t *Vk = &(env->fpr[vk].vec);
+
+    int i;
+    int m;
+    for (i = 0; i < 128/16; i++) {
+        if (Vj->H[i] < 0) {
+            break;
+        }
+    }
+    m = Vk->H[0] % 8;
+    Vd->H[m] = (int16_t)i;
+}
+
+void helper_vfrstpi_b(CPULoongArchState *env,
+                      uint32_t vd, uint32_t vj, uint32_t imm)
+{
+    vec_t *Vd = &(env->fpr[vd].vec);
+    vec_t *Vj = &(env->fpr[vj].vec);
+
+    int i;
+    int m;
+    for (i = 0; i < 128/8; i++) {
+        if (Vj->B[i] < 0) {
+            break;
+        }
+    }
+    m = imm % 16;
+    Vd->B[m] = (int8_t)i;
+}
+
+void helper_vfrstpi_h(CPULoongArchState *env,
+                      uint32_t vd, uint32_t vj, uint32_t imm)
+{
+    vec_t *Vd = &(env->fpr[vd].vec);
+    vec_t *Vj = &(env->fpr[vj].vec);
+
+    int i;
+    int m;
+    for (i = 0; i < 128/16; i++) {
+        if (Vj->H[i] < 0){
+            break;
+        }
+    }
+    m = imm % 8;
+    Vd->H[m] = (int16_t)i;
+}
-- 
2.31.1