[RFC PATCH 12/43] target/loongarch: Implement vabsd

[Song Gao]

This patch includes:
- VABSD.{B/H/W/D}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/disas.c                    |  9 +++
 target/loongarch/helper.h                   |  9 +++
 target/loongarch/insn_trans/trans_lsx.c.inc |  9 +++
 target/loongarch/insns.decode               |  9 +++
 target/loongarch/lsx_helper.c               | 63 +++++++++++++++++++++
 5 files changed, 99 insertions(+)

diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index b0a491033e..8ec612446c 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -896,3 +896,12 @@ INSN_LSX(vavgr_bu,         vvv)
 INSN_LSX(vavgr_hu,         vvv)
 INSN_LSX(vavgr_wu,         vvv)
 INSN_LSX(vavgr_du,         vvv)
+
+INSN_LSX(vabsd_b,          vvv)
+INSN_LSX(vabsd_h,          vvv)
+INSN_LSX(vabsd_w,          vvv)
+INSN_LSX(vabsd_d,          vvv)
+INSN_LSX(vabsd_bu,         vvv)
+INSN_LSX(vabsd_hu,         vvv)
+INSN_LSX(vabsd_wu,         vvv)
+INSN_LSX(vabsd_du,         vvv)
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index c6a387c54d..8298af2d40 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -250,3 +250,12 @@ DEF_HELPER_4(vavgr_bu, void, env, i32, i32, i32)
 DEF_HELPER_4(vavgr_hu, void, env, i32, i32, i32)
 DEF_HELPER_4(vavgr_wu, void, env, i32, i32, i32)
 DEF_HELPER_4(vavgr_du, void, env, i32, i32, i32)
+
+DEF_HELPER_4(vabsd_b, void, env, i32, i32, i32)
+DEF_HELPER_4(vabsd_h, void, env, i32, i32, i32)
+DEF_HELPER_4(vabsd_w, void, env, i32, i32, i32)
+DEF_HELPER_4(vabsd_d, void, env, i32, i32, i32)
+DEF_HELPER_4(vabsd_bu, void, env, i32, i32, i32)
+DEF_HELPER_4(vabsd_hu, void, env, i32, i32, i32)
+DEF_HELPER_4(vabsd_wu, void, env, i32, i32, i32)
+DEF_HELPER_4(vabsd_du, void, env, i32, i32, i32)
diff --git a/target/loongarch/insn_trans/trans_lsx.c.inc 
b/target/loongarch/insn_trans/trans_lsx.c.inc
index 2d43a88d74..00a921a935 100644
--- a/target/loongarch/insn_trans/trans_lsx.c.inc
+++ b/target/loongarch/insn_trans/trans_lsx.c.inc
@@ -168,3 +168,12 @@ TRANS(vavgr_bu, gen_vvv, gen_helper_vavgr_bu)
 TRANS(vavgr_hu, gen_vvv, gen_helper_vavgr_hu)
 TRANS(vavgr_wu, gen_vvv, gen_helper_vavgr_wu)
 TRANS(vavgr_du, gen_vvv, gen_helper_vavgr_du)
+
+TRANS(vabsd_b, gen_vvv, gen_helper_vabsd_b)
+TRANS(vabsd_h, gen_vvv, gen_helper_vabsd_h)
+TRANS(vabsd_w, gen_vvv, gen_helper_vabsd_w)
+TRANS(vabsd_d, gen_vvv, gen_helper_vabsd_d)
+TRANS(vabsd_bu, gen_vvv, gen_helper_vabsd_bu)
+TRANS(vabsd_hu, gen_vvv, gen_helper_vabsd_hu)
+TRANS(vabsd_wu, gen_vvv, gen_helper_vabsd_wu)
+TRANS(vabsd_du, gen_vvv, gen_helper_vabsd_du)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index de6e8a72a9..a770f37b99 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -618,3 +618,12 @@ vavgr_bu         0111 00000110 10100 ..... ..... .....    
@vvv
 vavgr_hu         0111 00000110 10101 ..... ..... .....    @vvv
 vavgr_wu         0111 00000110 10110 ..... ..... .....    @vvv
 vavgr_du         0111 00000110 10111 ..... ..... .....    @vvv
+
+vabsd_b          0111 00000110 00000 ..... ..... .....    @vvv
+vabsd_h          0111 00000110 00001 ..... ..... .....    @vvv
+vabsd_w          0111 00000110 00010 ..... ..... .....    @vvv
+vabsd_d          0111 00000110 00011 ..... ..... .....    @vvv
+vabsd_bu         0111 00000110 00100 ..... ..... .....    @vvv
+vabsd_hu         0111 00000110 00101 ..... ..... .....    @vvv
+vabsd_wu         0111 00000110 00110 ..... ..... .....    @vvv
+vabsd_du         0111 00000110 00111 ..... ..... .....    @vvv
diff --git a/target/loongarch/lsx_helper.c b/target/loongarch/lsx_helper.c
index 63161ecd1a..61dc92059e 100644
--- a/target/loongarch/lsx_helper.c
+++ b/target/loongarch/lsx_helper.c
@@ -841,3 +841,66 @@ DO_HELPER_VVV(vavgr_bu, 8, helper_vvv, do_vavgr_u)
 DO_HELPER_VVV(vavgr_hu, 16, helper_vvv, do_vavgr_u)
 DO_HELPER_VVV(vavgr_wu, 32, helper_vvv, do_vavgr_u)
 DO_HELPER_VVV(vavgr_du, 64, helper_vvv, do_vavgr_u)
+
+static int64_t vabsd_s(int64_t s1, int64_t s2)
+{
+    return s1 < s2 ? s2- s1 : s1 -s2;
+}
+
+static void do_vabsd_s(vec_t *Vd, vec_t *Vj, vec_t *Vk, int bit, int n)
+{
+    switch (bit) {
+    case 8:
+        Vd->B[n] = vabsd_s(Vj->B[n], Vk->B[n]);
+        break;
+    case 16:
+        Vd->H[n] = vabsd_s(Vj->H[n], Vk->H[n]);
+        break;
+    case 32:
+        Vd->W[n] = vabsd_s(Vj->W[n], Vk->W[n]);
+        break;
+    case 64:
+        Vd->D[n] = vabsd_s(Vj->D[n], Vk->D[n]);
+        break;
+    default:
+        g_assert_not_reached();
+    }
+}
+
+static uint64_t vabsd_u(int64_t s1, int64_t s2, int bit)
+{
+    uint64_t umax = MAKE_64BIT_MASK(0, bit);
+    uint64_t u1 = s1 & umax;
+    uint64_t u2 = s2 & umax;
+
+    return u1 < u2 ? u2 - u1 : u1 -u2;
+}
+
+static void do_vabsd_u(vec_t *Vd, vec_t *Vj, vec_t *Vk, int bit, int n)
+{
+    switch (bit) {
+    case 8:
+        Vd->B[n] = vabsd_u(Vj->B[n], Vk->B[n], bit);
+        break;
+    case 16:
+        Vd->H[n] = vabsd_u(Vj->H[n], Vk->H[n], bit);
+        break;
+    case 32:
+        Vd->W[n] = vabsd_u(Vj->W[n], Vk->W[n], bit);
+        break;
+    case 64:
+        Vd->D[n] = vabsd_u(Vj->D[n], Vk->D[n], bit);
+        break;
+    default:
+        g_assert_not_reached();
+    }
+}
+
+DO_HELPER_VVV(vabsd_b, 8, helper_vvv, do_vabsd_s)
+DO_HELPER_VVV(vabsd_h, 16, helper_vvv, do_vabsd_s)
+DO_HELPER_VVV(vabsd_w, 32, helper_vvv, do_vabsd_s)
+DO_HELPER_VVV(vabsd_d, 64, helper_vvv, do_vabsd_s)
+DO_HELPER_VVV(vabsd_bu, 8, helper_vvv, do_vabsd_u)
+DO_HELPER_VVV(vabsd_hu, 16, helper_vvv, do_vabsd_u)
+DO_HELPER_VVV(vabsd_wu, 32, helper_vvv, do_vabsd_u)
+DO_HELPER_VVV(vabsd_du, 64, helper_vvv, do_vabsd_u)
-- 
2.31.1