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[RFC PATCH 31/43] target/loongarch: Implement vpcnt


From: Song Gao
Subject: [RFC PATCH 31/43] target/loongarch: Implement vpcnt
Date: Sat, 24 Dec 2022 16:16:21 +0800

This patch includes:
- VPCNT.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/disas.c                    |  5 +++
 target/loongarch/helper.h                   |  5 +++
 target/loongarch/insn_trans/trans_lsx.c.inc |  5 +++
 target/loongarch/insns.decode               |  5 +++
 target/loongarch/lsx_helper.c               | 39 +++++++++++++++++++++
 5 files changed, 59 insertions(+)

diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index 865c293f43..e3d4d105fe 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -1238,3 +1238,8 @@ INSN_LSX(vclz_b,           vv)
 INSN_LSX(vclz_h,           vv)
 INSN_LSX(vclz_w,           vv)
 INSN_LSX(vclz_d,           vv)
+
+INSN_LSX(vpcnt_b,          vv)
+INSN_LSX(vpcnt_h,          vv)
+INSN_LSX(vpcnt_w,          vv)
+INSN_LSX(vpcnt_d,          vv)
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index 0080890bf6..6869b05105 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -593,3 +593,8 @@ DEF_HELPER_3(vclz_b, void, env, i32, i32)
 DEF_HELPER_3(vclz_h, void, env, i32, i32)
 DEF_HELPER_3(vclz_w, void, env, i32, i32)
 DEF_HELPER_3(vclz_d, void, env, i32, i32)
+
+DEF_HELPER_3(vpcnt_b, void, env, i32, i32)
+DEF_HELPER_3(vpcnt_h, void, env, i32, i32)
+DEF_HELPER_3(vpcnt_w, void, env, i32, i32)
+DEF_HELPER_3(vpcnt_d, void, env, i32, i32)
diff --git a/target/loongarch/insn_trans/trans_lsx.c.inc 
b/target/loongarch/insn_trans/trans_lsx.c.inc
index 105b6fac6e..38493c98b0 100644
--- a/target/loongarch/insn_trans/trans_lsx.c.inc
+++ b/target/loongarch/insn_trans/trans_lsx.c.inc
@@ -509,3 +509,8 @@ TRANS(vclz_b, gen_vv, gen_helper_vclz_b)
 TRANS(vclz_h, gen_vv, gen_helper_vclz_h)
 TRANS(vclz_w, gen_vv, gen_helper_vclz_w)
 TRANS(vclz_d, gen_vv, gen_helper_vclz_d)
+
+TRANS(vpcnt_b, gen_vv, gen_helper_vpcnt_b)
+TRANS(vpcnt_h, gen_vv, gen_helper_vpcnt_h)
+TRANS(vpcnt_w, gen_vv, gen_helper_vpcnt_w)
+TRANS(vpcnt_d, gen_vv, gen_helper_vpcnt_d)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index 27cfa306c9..812262ff78 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -967,3 +967,8 @@ vclz_b           0111 00101001 11000 00100 ..... .....    
@vv
 vclz_h           0111 00101001 11000 00101 ..... .....    @vv
 vclz_w           0111 00101001 11000 00110 ..... .....    @vv
 vclz_d           0111 00101001 11000 00111 ..... .....    @vv
+
+vpcnt_b          0111 00101001 11000 01000 ..... .....    @vv
+vpcnt_h          0111 00101001 11000 01001 ..... .....    @vv
+vpcnt_w          0111 00101001 11000 01010 ..... .....    @vv
+vpcnt_d          0111 00101001 11000 01011 ..... .....    @vv
diff --git a/target/loongarch/lsx_helper.c b/target/loongarch/lsx_helper.c
index 0abb06781f..c9913dec54 100644
--- a/target/loongarch/lsx_helper.c
+++ b/target/loongarch/lsx_helper.c
@@ -3197,3 +3197,42 @@ DO_HELPER_VV(vclz_b, 8, helper_vv, do_vclz)
 DO_HELPER_VV(vclz_h, 16, helper_vv, do_vclz)
 DO_HELPER_VV(vclz_w, 32, helper_vv, do_vclz)
 DO_HELPER_VV(vclz_d, 64, helper_vv, do_vclz)
+
+static uint64_t vpcnt(int64_t s1, int bit)
+{
+    uint64_t u1 = s1 & MAKE_64BIT_MASK(0, bit);
+
+    u1 = (u1 & 0x5555555555555555ULL) + ((u1 >>  1) & 0x5555555555555555ULL);
+    u1 = (u1 & 0x3333333333333333ULL) + ((u1 >>  2) & 0x3333333333333333ULL);
+    u1 = (u1 & 0x0F0F0F0F0F0F0F0FULL) + ((u1 >>  4) & 0x0F0F0F0F0F0F0F0FULL);
+    u1 = (u1 & 0x00FF00FF00FF00FFULL) + ((u1 >>  8) & 0x00FF00FF00FF00FFULL);
+    u1 = (u1 & 0x0000FFFF0000FFFFULL) + ((u1 >> 16) & 0x0000FFFF0000FFFFULL);
+    u1 = (u1 & 0x00000000FFFFFFFFULL) + ((u1 >> 32));
+
+    return u1;
+}
+
+static void do_vpcnt(vec_t *Vd, vec_t *Vj, int bit, int n)
+{
+    switch (bit) {
+    case 8:
+        Vd->B[n] = vpcnt(Vj->B[n], bit);
+        break;
+    case 16:
+        Vd->H[n] = vpcnt(Vj->H[n], bit);
+        break;
+    case 32:
+        Vd->W[n] = vpcnt(Vj->W[n], bit);
+        break;
+    case 64:
+        Vd->D[n] = vpcnt(Vj->D[n], bit);
+        break;
+    default:
+        g_assert_not_reached();
+    }
+}
+
+DO_HELPER_VV(vpcnt_b, 8, helper_vv, do_vpcnt)
+DO_HELPER_VV(vpcnt_h, 16, helper_vv, do_vpcnt)
+DO_HELPER_VV(vpcnt_w, 32, helper_vv, do_vpcnt)
+DO_HELPER_VV(vpcnt_d, 64, helper_vv, do_vpcnt)
-- 
2.31.1




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