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[PULL 10/26] hw/arm/smmu: Introduce CACHED_ENTRY_TO_ADDR
From: |
Peter Maydell |
Subject: |
[PULL 10/26] hw/arm/smmu: Introduce CACHED_ENTRY_TO_ADDR |
Date: |
Thu, 18 Jul 2024 14:20:12 +0100 |
From: Mostafa Saleh <smostafa@google.com>
Soon, smmuv3_do_translate() will be used to translate the CD and the
TTBx, instead of re-writting the same logic to convert the returned
cached entry to an address, add a new macro CACHED_ENTRY_TO_ADDR.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Mostafa Saleh <smostafa@google.com>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20240715084519.1189624-8-smostafa@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/smmu-common.h | 3 +++
hw/arm/smmuv3.c | 3 +--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
index 5cb30244646..f793b54388d 100644
--- a/include/hw/arm/smmu-common.h
+++ b/include/hw/arm/smmu-common.h
@@ -37,6 +37,9 @@
#define VMSA_IDXMSK(isz, strd, lvl) ((1ULL << \
VMSA_BIT_LVL(isz, strd, lvl)) - 1)
+#define CACHED_ENTRY_TO_ADDR(ent, addr) ((ent)->entry.translated_addr + \
+ ((addr) & (ent)->entry.addr_mask))
+
/*
* Page table walk error types
*/
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index e71b842162a..dc63e07d683 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -951,8 +951,7 @@ epilogue:
switch (status) {
case SMMU_TRANS_SUCCESS:
entry.perm = cached_entry->entry.perm;
- entry.translated_addr = cached_entry->entry.translated_addr +
- (addr & cached_entry->entry.addr_mask);
+ entry.translated_addr = CACHED_ENTRY_TO_ADDR(cached_entry, addr);
entry.addr_mask = cached_entry->entry.addr_mask;
trace_smmuv3_translate_success(mr->parent_obj.name, sid, addr,
entry.translated_addr, entry.perm,
--
2.34.1
- [PULL 03/26] hw/display/bcm2835_fb: fix fb_use_offsets condition, (continued)
- [PULL 03/26] hw/display/bcm2835_fb: fix fb_use_offsets condition, Peter Maydell, 2024/07/18
- [PULL 02/26] target/arm: LDAPR should honour SCTLR_ELx.nAA, Peter Maydell, 2024/07/18
- [PULL 17/26] hw/arm/smmu: Support nesting in the rest of commands, Peter Maydell, 2024/07/18
- [PULL 25/26] tests/arm-cpu-features: Do not assume PMU availability, Peter Maydell, 2024/07/18
- [PULL 04/26] hw/arm/smmu-common: Add missing size check for stage-1, Peter Maydell, 2024/07/18
- [PULL 06/26] hw/arm/smmuv3: Fix encoding of CLASS in events, Peter Maydell, 2024/07/18
- [PULL 11/26] hw/arm/smmuv3: Translate CD and TT using stage-2 table, Peter Maydell, 2024/07/18
- [PULL 07/26] hw/arm/smmu: Use enum for SMMU stage, Peter Maydell, 2024/07/18
- [PULL 21/26] hw/arm/smmu: Refactor SMMU OAS, Peter Maydell, 2024/07/18
- [PULL 01/26] target/arm: Fix handling of LDAPR/STLR with negative offset, Peter Maydell, 2024/07/18
- [PULL 10/26] hw/arm/smmu: Introduce CACHED_ENTRY_TO_ADDR,
Peter Maydell <=
- [PULL 09/26] hw/arm/smmu: Consolidate ASID and VMID types, Peter Maydell, 2024/07/18
- [PULL 19/26] hw/arm/smmuv3: Handle translation faults according to SMMUPTWEventInfo, Peter Maydell, 2024/07/18
- [PULL 22/26] target/arm: Use float_status copy in sme_fmopa_s, Peter Maydell, 2024/07/18
- [PULL 24/26] tests/tcg/aarch64: Add test cases for SME FMOPA (widening), Peter Maydell, 2024/07/18
- [PULL 08/26] hw/arm/smmu: Split smmuv3_translate(), Peter Maydell, 2024/07/18
- [PULL 15/26] hw/arm/smmu: Support nesting in smmuv3_range_inval(), Peter Maydell, 2024/07/18
- [PULL 18/26] hw/arm/smmuv3: Support nested SMMUs in smmuv3_notify_iova(), Peter Maydell, 2024/07/18
- [PULL 23/26] target/arm: Use FPST_F16 for SME FMOPA (widening), Peter Maydell, 2024/07/18
- [PULL 12/26] hw/arm/smmu-common: Rework TLB lookup for nesting, Peter Maydell, 2024/07/18
- [PULL 13/26] hw/arm/smmu-common: Add support for nested TLB, Peter Maydell, 2024/07/18