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[PULL 43/96] pnv/xive2: Structure/define alignment changes
From: |
Nicholas Piggin |
Subject: |
[PULL 43/96] pnv/xive2: Structure/define alignment changes |
Date: |
Fri, 26 Jul 2024 09:53:16 +1000 |
From: Michael Kowal <kowal@linux.vnet.ibm.com>
Made changes to some structure and define elements to ease review in
next patchset.
Signed-off-by: Michael Kowal <kowal@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/intc/pnv_xive2.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index af9ab68fc6..08b6da78fb 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -45,16 +45,16 @@ typedef struct XiveVstInfo {
static const XiveVstInfo vst_infos[] = {
- [VST_EAS] = { "EAT", sizeof(Xive2Eas), 16 },
- [VST_ESB] = { "ESB", 1, 16 },
- [VST_END] = { "ENDT", sizeof(Xive2End), 16 },
+ [VST_EAS] = { "EAT", sizeof(Xive2Eas), 16 },
+ [VST_ESB] = { "ESB", 1, 16 },
+ [VST_END] = { "ENDT", sizeof(Xive2End), 16 },
- [VST_NVP] = { "NVPT", sizeof(Xive2Nvp), 16 },
- [VST_NVG] = { "NVGT", sizeof(Xive2Nvgc), 16 },
- [VST_NVC] = { "NVCT", sizeof(Xive2Nvgc), 16 },
+ [VST_NVP] = { "NVPT", sizeof(Xive2Nvp), 16 },
+ [VST_NVG] = { "NVGT", sizeof(Xive2Nvgc), 16 },
+ [VST_NVC] = { "NVCT", sizeof(Xive2Nvgc), 16 },
- [VST_IC] = { "IC", 1 /* ? */ , 16 }, /* Topology # */
- [VST_SYNC] = { "SYNC", 1 /* ? */ , 16 }, /* Topology # */
+ [VST_IC] = { "IC", 1, /* ? */ 16 }, /* Topology # */
+ [VST_SYNC] = { "SYNC", 1, /* ? */ 16 }, /* Topology # */
/*
* This table contains the backing store pages for the interrupt
@@ -1720,13 +1720,13 @@ static const MemoryRegionOps pnv_xive2_ic_lsi_ops = {
/*
* Sync MMIO page (write only)
*/
-#define PNV_XIVE2_SYNC_IPI 0x000
-#define PNV_XIVE2_SYNC_HW 0x080
-#define PNV_XIVE2_SYNC_NxC 0x100
-#define PNV_XIVE2_SYNC_INT 0x180
-#define PNV_XIVE2_SYNC_OS_ESC 0x200
-#define PNV_XIVE2_SYNC_POOL_ESC 0x280
-#define PNV_XIVE2_SYNC_HARD_ESC 0x300
+#define PNV_XIVE2_SYNC_IPI 0x000
+#define PNV_XIVE2_SYNC_HW 0x080
+#define PNV_XIVE2_SYNC_NxC 0x100
+#define PNV_XIVE2_SYNC_INT 0x180
+#define PNV_XIVE2_SYNC_OS_ESC 0x200
+#define PNV_XIVE2_SYNC_POOL_ESC 0x280
+#define PNV_XIVE2_SYNC_HARD_ESC 0x300
static uint64_t pnv_xive2_ic_sync_read(void *opaque, hwaddr offset,
unsigned size)
--
2.45.2
- [PULL 34/96] ppc/pnv: Implement POWER10 PC xscom registers for direct controls, (continued)
- [PULL 34/96] ppc/pnv: Implement POWER10 PC xscom registers for direct controls, Nicholas Piggin, 2024/07/25
- [PULL 37/96] hw/ssi: Add SPI model, Nicholas Piggin, 2024/07/25
- [PULL 38/96] hw/ssi: Extend SPI model, Nicholas Piggin, 2024/07/25
- [PULL 39/96] hw/block: Add Microchip's 25CSM04 to m25p80, Nicholas Piggin, 2024/07/25
- [PULL 40/96] hw/ppc: SPI controller wiring to P10 chip, Nicholas Piggin, 2024/07/25
- [PULL 41/96] tests/qtest: Add pnv-spi-seeprom qtest, Nicholas Piggin, 2024/07/25
- [PULL 42/96] pnv/xive2: XIVE2 Cache Watch, Cache Flush and Sync Injection support, Nicholas Piggin, 2024/07/25
- [PULL 44/96] pnv/xive: Support cache flush and queue sync inject with notifications, Nicholas Piggin, 2024/07/25
- [PULL 46/96] pnv/xive2: Configure Virtualization Structure Tables through the PC, Nicholas Piggin, 2024/07/25
- [PULL 45/96] pnv/xive2: Add NVG and NVC to cache watch facility, Nicholas Piggin, 2024/07/25
- [PULL 43/96] pnv/xive2: Structure/define alignment changes,
Nicholas Piggin <=
- [PULL 47/96] pnv/xive2: Enable VST NVG and NVC index compression, Nicholas Piggin, 2024/07/25
- [PULL 48/96] pnv/xive2: Set Translation Table for the NVC port space, Nicholas Piggin, 2024/07/25
- [PULL 49/96] pnv/xive2: Fail VST entry address computation if table has no VSD, Nicholas Piggin, 2024/07/25
- [PULL 51/96] pnv/xive2: Refine TIMA 'info pic' output, Nicholas Piggin, 2024/07/25
- [PULL 50/96] pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.c, Nicholas Piggin, 2024/07/25
- [PULL 52/96] pnv/xive2: Dump more END state with 'info pic', Nicholas Piggin, 2024/07/25
- [PULL 53/96] target/ppc: Move VMX integer add/sub saturate insns to decodetree., Nicholas Piggin, 2024/07/25
- [PULL 54/96] target/ppc: Improve VMX integer add/sub saturate instructions., Nicholas Piggin, 2024/07/25
- [PULL 55/96] target/ppc: Move ISA300 flag check out of do_helper_XX3., Nicholas Piggin, 2024/07/25
- [PULL 56/96] target/ppc: Move VSX arithmetic and max/min insns to decodetree., Nicholas Piggin, 2024/07/25