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[PULL 48/96] pnv/xive2: Set Translation Table for the NVC port space
From: |
Nicholas Piggin |
Subject: |
[PULL 48/96] pnv/xive2: Set Translation Table for the NVC port space |
Date: |
Fri, 26 Jul 2024 09:53:21 +1000 |
From: Frederic Barrat <fbarrat@linux.ibm.com>
Set Translation Table for the NVC port space is missing. The xive model
doesn't take into account the remapping of IO operations via the Set
Translation Table but firmware is allowed to define it for the Notify
Virtual Crowd (NVC), like it's already done for the other VST tables.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Kowal <kowal@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/intc/pnv_xive2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index c3b5bfe61f..08b9166a09 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -722,6 +722,7 @@ static int pnv_xive2_stt_set_data(PnvXive2 *xive, uint64_t
val)
case CQ_TAR_NVPG:
case CQ_TAR_ESB:
case CQ_TAR_END:
+ case CQ_TAR_NVC:
xive->tables[tsel][entry] = val;
break;
default:
--
2.45.2
- [PULL 38/96] hw/ssi: Extend SPI model, (continued)
- [PULL 38/96] hw/ssi: Extend SPI model, Nicholas Piggin, 2024/07/25
- [PULL 39/96] hw/block: Add Microchip's 25CSM04 to m25p80, Nicholas Piggin, 2024/07/25
- [PULL 40/96] hw/ppc: SPI controller wiring to P10 chip, Nicholas Piggin, 2024/07/25
- [PULL 41/96] tests/qtest: Add pnv-spi-seeprom qtest, Nicholas Piggin, 2024/07/25
- [PULL 42/96] pnv/xive2: XIVE2 Cache Watch, Cache Flush and Sync Injection support, Nicholas Piggin, 2024/07/25
- [PULL 44/96] pnv/xive: Support cache flush and queue sync inject with notifications, Nicholas Piggin, 2024/07/25
- [PULL 46/96] pnv/xive2: Configure Virtualization Structure Tables through the PC, Nicholas Piggin, 2024/07/25
- [PULL 45/96] pnv/xive2: Add NVG and NVC to cache watch facility, Nicholas Piggin, 2024/07/25
- [PULL 43/96] pnv/xive2: Structure/define alignment changes, Nicholas Piggin, 2024/07/25
- [PULL 47/96] pnv/xive2: Enable VST NVG and NVC index compression, Nicholas Piggin, 2024/07/25
- [PULL 48/96] pnv/xive2: Set Translation Table for the NVC port space,
Nicholas Piggin <=
- [PULL 49/96] pnv/xive2: Fail VST entry address computation if table has no VSD, Nicholas Piggin, 2024/07/25
- [PULL 51/96] pnv/xive2: Refine TIMA 'info pic' output, Nicholas Piggin, 2024/07/25
- [PULL 50/96] pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.c, Nicholas Piggin, 2024/07/25
- [PULL 52/96] pnv/xive2: Dump more END state with 'info pic', Nicholas Piggin, 2024/07/25
- [PULL 53/96] target/ppc: Move VMX integer add/sub saturate insns to decodetree., Nicholas Piggin, 2024/07/25
- [PULL 54/96] target/ppc: Improve VMX integer add/sub saturate instructions., Nicholas Piggin, 2024/07/25
- [PULL 55/96] target/ppc: Move ISA300 flag check out of do_helper_XX3., Nicholas Piggin, 2024/07/25
- [PULL 56/96] target/ppc: Move VSX arithmetic and max/min insns to decodetree., Nicholas Piggin, 2024/07/25
- [PULL 57/96] target/ppc: Move VSX logical instructions to decodetree., Nicholas Piggin, 2024/07/25
- [PULL 58/96] target/ppc: Moving VSX scalar storage access insns to decodetree., Nicholas Piggin, 2024/07/25