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[PULL 44/67] spapr: nested: Add support for DPDES SPR in GSB for TCG L0
From: |
Nicholas Piggin |
Subject: |
[PULL 44/67] spapr: nested: Add support for DPDES SPR in GSB for TCG L0 |
Date: |
Mon, 4 Nov 2024 10:18:33 +1000 |
From: Amit Machhiwal <amachhiw@linux.ibm.com>
The DPDES support for doorbell emulation and handling for KVM on PAPR
guests was added in Linux via [1]. Subsequently, a new GSB (Guest State
Buffer) element for DPDES was added in Linux; the same has been missing
in TCG L0 implementation. Add support for DPDES register's APIv2 GSB
element and required handling in `spapr_nested.c`.
Currently, booting a KVM guest inside a QEMU TCG guest fails with the
following crash. The crash occurs while handling the GUEST_RUN_VCPU
hcall made in TCG L0. In the hcall handling path, map_and_getset_state()
calls getset_state(), which, in turn, calls guest_state_request_check()
to validate the GSR (Guest State Request) elements. During this process,
guest_state_request_check() iterates over the GSR elements and receives
a NULL return code from guest_state_element_type_find() for the type
variable corresponding to the DPDES register's elemetn ID (which was
unknown to TCG L0). Subsequently, getset_state() returns H_P3,
ultimately leading to the hcall failure and causing the KVM guest to
crash.
KVM: unknown exit, hardware reason ffffffffffffffea
[ ... KVM register dump ... ]
Fix this by adding the required support in TCG L0 implementation of
APIv2.
[1] https://lore.kernel.org/all/20240605113913.83715-1-gautam@linux.ibm.com/
Fixes: 4a575f9a0567 ("spapr: nested: Initialize the GSB elements lookup table.")
Suggested-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Amit Machhiwal <amachhiw@linux.ibm.com>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/ppc/spapr_nested.c | 1 +
include/hw/ppc/spapr_nested.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_nested.c b/hw/ppc/spapr_nested.c
index c02785756c..1b41c8fb8b 100644
--- a/hw/ppc/spapr_nested.c
+++ b/hw/ppc/spapr_nested.c
@@ -982,6 +982,7 @@ struct guest_state_element_type guest_state_element_types[]
= {
GUEST_STATE_ELEMENT_ENV_DW(GSB_VCPU_SPR_FSCR, fscr),
GUEST_STATE_ELEMENT_ENV_W(GSB_VCPU_SPR_PSPB, pspb),
GUEST_STATE_ELEMENT_ENV_DW(GSB_VCPU_SPR_CTRL, ctrl),
+ GUEST_STATE_ELEMENT_ENV_DW(GSB_VCPU_SPR_DPDES, dpdes),
GUEST_STATE_ELEMENT_ENV_W(GSB_VCPU_SPR_VRSAVE, vrsave),
GUEST_STATE_ELEMENT_ENV_DW(GSB_VCPU_SPR_DAR, dar),
GUEST_STATE_ELEMENT_ENV_W(GSB_VCPU_SPR_DSISR, dsisr),
diff --git a/include/hw/ppc/spapr_nested.h b/include/hw/ppc/spapr_nested.h
index 93ef14adcc..3b5cd993c2 100644
--- a/include/hw/ppc/spapr_nested.h
+++ b/include/hw/ppc/spapr_nested.h
@@ -99,7 +99,8 @@
#define GSB_VCPU_SPR_HASHKEYR 0x1050
#define GSB_VCPU_SPR_HASHPKEYR 0x1051
#define GSB_VCPU_SPR_CTRL 0x1052
- /* RESERVED 0x1053 - 0x1FFF */
+#define GSB_VCPU_SPR_DPDES 0x1053
+ /* RESERVED 0x1054 - 0x1FFF */
#define GSB_VCPU_SPR_CR 0x2000
#define GSB_VCPU_SPR_PIDR 0x2001
#define GSB_VCPU_SPR_DSISR 0x2002
--
2.45.2
- [PULL 46/67] hw/ppc: Implement -dtb support for PowerNV, (continued)
- [PULL 46/67] hw/ppc: Implement -dtb support for PowerNV, Nicholas Piggin, 2024/11/03
- [PULL 45/67] spapr: nested: Add Power11 capability support for Nested PAPR guests in TCG L0, Nicholas Piggin, 2024/11/03
- [PULL 41/67] target/ppc: simplify var usage in ppc_next_unmasked_interrupt, Nicholas Piggin, 2024/11/03
- [PULL 48/67] pnv/xive: TIMA patch sets pre-req alignment and formatting changes, Nicholas Piggin, 2024/11/03
- [PULL 47/67] ppc/xive: Fix ESB length overflow on 32-bit hosts, Nicholas Piggin, 2024/11/03
- [PULL 49/67] pnv/xive2: Define OGEN field in the TIMA, Nicholas Piggin, 2024/11/03
- [PULL 51/67] pnv/xive2: Support for "OS LGS Push" TIMA operation, Nicholas Piggin, 2024/11/03
- [PULL 50/67] ppc/xive2: Support TIMA "Pull OS Context to Odd Thread Reporting Line", Nicholas Piggin, 2024/11/03
- [PULL 52/67] ppc/xive2: Dump more NVP state with 'info pic', Nicholas Piggin, 2024/11/03
- [PULL 57/67] ppc/xive2: Support "Pull Thread Context to Odd Thread Reporting Line", Nicholas Piggin, 2024/11/03
- [PULL 44/67] spapr: nested: Add support for DPDES SPR in GSB for TCG L0,
Nicholas Piggin <=
- [PULL 54/67] ppc/xive2: Allow 1-byte write of Target field in TIMA, Nicholas Piggin, 2024/11/03
- [PULL 59/67] pnv/xive: Update PIPR when updating CPPR, Nicholas Piggin, 2024/11/03
- [PULL 60/67] pnv/xive2: TIMA support for 8-byte OS context push for PHYP, Nicholas Piggin, 2024/11/03
- [PULL 61/67] pnv/xive2: TIMA CI ops using alternative offsets or byte lengths, Nicholas Piggin, 2024/11/03
- [PULL 53/67] ppc/xive2: Dump the VP-group and crowd tables with 'info pic', Nicholas Piggin, 2024/11/03
- [PULL 55/67] ppc/xive2: Support "Pull Thread Context to Register" operation, Nicholas Piggin, 2024/11/03
- [PULL 58/67] pnv/xive: Add special handling for pool targets, Nicholas Piggin, 2024/11/03
- [PULL 56/67] ppc/xive2: Change context/ring specific functions to be generic, Nicholas Piggin, 2024/11/03
- [PULL 62/67] tests/qtest: Add XIVE tests for the powernv10 machine, Nicholas Piggin, 2024/11/03
- [PULL 63/67] hw/ppc: Consolidate e500 initial mapping creation functions, Nicholas Piggin, 2024/11/03