Re: [PATCH v3 12/20] target/riscv: implement zicfiss instructions

[Richard Henderson]

On 8/7/24 12:39, Richard Henderson wrote:
> > +static bool trans_sspopchk(DisasContext *ctx, arg_sspopchk *a)
> > +{
> > +    /* default for qemu-user, use regular RW memory and thus mmu_idx=0 */
> > +    int ss_mmu_idx = 0;
>
> This can't be right, since 0 is M_MODE.

I'm wrong about m-mode here, but "0" is certainly not right.

I strongly suspect you want "ctx->mem_idx | MMU_IDX_SS_ACCESS",
once you add that bit in a few patches.


r~