Re: [Qemu-devel] [PATCH 19/24] target-arm: Implement AArch64 TTBR*

[Peter Maydell]

On 24 January 2014 23:44, Peter Crosthwaite
<address@hidden> wrote:
>> +static int vmsa_ttbr_write(CPUARMState *env, const ARMCPRegInfo *ri,
>> +                             uint64_t value)
>> +{
>> +    /* 64 bit accesses to the TTBRs can change the ASID and so we
>> +     * must flush the TLB.
>> +     */
>> +    if ((ri->state == ARM_CP_STATE_AA64) || (ri->type & ARM_CP_64BIT)) {
>> +        tlb_flush(env, 1);
>> +    }
>
> With the level of complexity this if has reached, is it better to just
> check for this ASID change rather than make this overly conservative
> flush?

I just did a test boot on an A15 guest (which uses the long TTBR
format) and in a Linux boot to the login prompt it did 9097
TTBR writes; just six of those involved no change to the ASID.
So it doesn't seem really worth making the check to me.

thanks
-- PMM