[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 08/40] tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patterns
From: |
Alex Bennée |
Subject: |
[PULL 08/40] tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patterns |
Date: |
Fri, 5 Jul 2024 16:30:20 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
This option is not supported by clang, and is not required
in order to get sve code generation with gcc 12.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240630190050.160642-4-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-9-alex.bennee@linaro.org>
diff --git a/tests/tcg/aarch64/Makefile.softmmu-target
b/tests/tcg/aarch64/Makefile.softmmu-target
index 39d3f961c5..dd6d595830 100644
--- a/tests/tcg/aarch64/Makefile.softmmu-target
+++ b/tests/tcg/aarch64/Makefile.softmmu-target
@@ -39,7 +39,7 @@ memory: CFLAGS+=-DCHECK_UNALIGNED=1
memory-sve: memory.c $(LINK_SCRIPT) $(CRT_OBJS) $(MINILIB_OBJS)
$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
-memory-sve: CFLAGS+=-DCHECK_UNALIGNED=1 -march=armv8.1-a+sve -O3
-fno-tree-loop-distribute-patterns
+memory-sve: CFLAGS+=-DCHECK_UNALIGNED=1 -march=armv8.1-a+sve -O3
TESTS+=memory-sve
--
2.39.2
- [PULL 05/40] tests/docker: Specify --userns keep-id for Podman, (continued)
- [PULL 05/40] tests/docker: Specify --userns keep-id for Podman, Alex Bennée, 2024/07/05
- [PULL 01/40] tests/lcitool: fix debian-i686-cross toolchain prefix, Alex Bennée, 2024/07/05
- [PULL 06/40] tests/tcg/minilib: Constify digits in print_num, Alex Bennée, 2024/07/05
- [PULL 12/40] tests/tcg/aarch64: Add -fno-integrated-as for sme, Alex Bennée, 2024/07/05
- [PULL 03/40] tracepoints: move physmem trace points, Alex Bennée, 2024/07/05
- [PULL 02/40] testing: restore some testing for i686, Alex Bennée, 2024/07/05
- [PULL 04/40] hw/core: ensure kernel_end never gets used undefined, Alex Bennée, 2024/07/05
- [PULL 07/40] tests/tcg: Adjust variable defintion from cc-option, Alex Bennée, 2024/07/05
- [PULL 10/40] tests/tcg/aarch64: Fix irg operand type, Alex Bennée, 2024/07/05
- [PULL 13/40] tests/tcg/arm: Fix fcvt result messages, Alex Bennée, 2024/07/05
- [PULL 08/40] tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patterns,
Alex Bennée <=
- [PULL 09/40] tests/tcg/aarch64: Explicitly specify register width, Alex Bennée, 2024/07/05
- [PULL 15/40] tests/tcg/arm: Use -fno-integrated-as for test-arm-iwmmxt, Alex Bennée, 2024/07/05
- [PULL 17/40] tests/tcg/arm: Use -march and -mfpu for fcvt, Alex Bennée, 2024/07/05
- [PULL 37/40] gdbstub: Pass CPU context to command handler, Alex Bennée, 2024/07/05
- [PULL 35/40] target/arm: Factor out code for setting MTE TCF0 field, Alex Bennée, 2024/07/05
- [PULL 40/40] tests/tcg/aarch64: Add MTE gdbstub tests, Alex Bennée, 2024/07/05
- [PULL 11/40] tests/tcg/aarch64: Do not use x constraint, Alex Bennée, 2024/07/05
- [PULL 14/40] tests/tcg/arm: Drop -N from LDFLAGS, Alex Bennée, 2024/07/05
- [PULL 16/40] tests/tcg/arm: Manually register allocate half-precision numbers, Alex Bennée, 2024/07/05
- [PULL 27/40] plugins: Ensure vCPU index is assigned in init/exit hooks, Alex Bennée, 2024/07/05