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[PULL 14/40] tests/tcg/arm: Drop -N from LDFLAGS
From: |
Alex Bennée |
Subject: |
[PULL 14/40] tests/tcg/arm: Drop -N from LDFLAGS |
Date: |
Fri, 5 Jul 2024 16:30:26 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
This is redudant with a linker script, and is not
supported by clang.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240630190050.160642-10-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-15-alex.bennee@linaro.org>
diff --git a/tests/tcg/arm/Makefile.softmmu-target
b/tests/tcg/arm/Makefile.softmmu-target
index 39e01ce49d..547063c08c 100644
--- a/tests/tcg/arm/Makefile.softmmu-target
+++ b/tests/tcg/arm/Makefile.softmmu-target
@@ -13,7 +13,7 @@ VPATH += $(ARM_SRC)
test-armv6m-undef: test-armv6m-undef.S
$(CC) -mcpu=cortex-m0 -mfloat-abi=soft \
-Wl,--build-id=none -x assembler-with-cpp \
- $< -o $@ -nostdlib -N -static \
+ $< -o $@ -nostdlib -static \
-T $(ARM_SRC)/$@.ld
run-test-armv6m-undef: QEMU_OPTS=-semihosting-config
enable=on,target=native,chardev=output -M microbit -kernel
@@ -30,7 +30,7 @@ CRT_PATH=$(ARM_SRC)
LINK_SCRIPT=$(ARM_SRC)/kernel.ld
LDFLAGS=-Wl,-T$(LINK_SCRIPT)
CFLAGS+=-nostdlib -ggdb -O0 $(MINILIB_INC)
-LDFLAGS+=-static -nostdlib -N $(CRT_OBJS) $(MINILIB_OBJS) -lgcc
+LDFLAGS+=-static -nostdlib $(CRT_OBJS) $(MINILIB_OBJS) -lgcc
# building head blobs
.PRECIOUS: $(CRT_OBJS)
--
2.39.2
- [PULL 10/40] tests/tcg/aarch64: Fix irg operand type, (continued)
- [PULL 10/40] tests/tcg/aarch64: Fix irg operand type, Alex Bennée, 2024/07/05
- [PULL 13/40] tests/tcg/arm: Fix fcvt result messages, Alex Bennée, 2024/07/05
- [PULL 08/40] tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patterns, Alex Bennée, 2024/07/05
- [PULL 09/40] tests/tcg/aarch64: Explicitly specify register width, Alex Bennée, 2024/07/05
- [PULL 15/40] tests/tcg/arm: Use -fno-integrated-as for test-arm-iwmmxt, Alex Bennée, 2024/07/05
- [PULL 17/40] tests/tcg/arm: Use -march and -mfpu for fcvt, Alex Bennée, 2024/07/05
- [PULL 37/40] gdbstub: Pass CPU context to command handler, Alex Bennée, 2024/07/05
- [PULL 35/40] target/arm: Factor out code for setting MTE TCF0 field, Alex Bennée, 2024/07/05
- [PULL 40/40] tests/tcg/aarch64: Add MTE gdbstub tests, Alex Bennée, 2024/07/05
- [PULL 11/40] tests/tcg/aarch64: Do not use x constraint, Alex Bennée, 2024/07/05
- [PULL 14/40] tests/tcg/arm: Drop -N from LDFLAGS,
Alex Bennée <=
- [PULL 16/40] tests/tcg/arm: Manually register allocate half-precision numbers, Alex Bennée, 2024/07/05
- [PULL 27/40] plugins: Ensure vCPU index is assigned in init/exit hooks, Alex Bennée, 2024/07/05
- [PULL 32/40] gdbstub: Add support for target-specific stubs, Alex Bennée, 2024/07/05
- [PULL 21/40] test/plugin: make insn plugin less noisy by default, Alex Bennée, 2024/07/05
- [PULL 29/40] accel/tcg: Move qemu_plugin_vcpu_init__async() to plugins/, Alex Bennée, 2024/07/05
- [PULL 34/40] target/arm: Make some MTE helpers widely available, Alex Bennée, 2024/07/05
- [PULL 25/40] plugins/lockstep: mention the one-insn-per-tb option, Alex Bennée, 2024/07/05
- [PULL 24/40] plugins/lockstep: make mixed-mode safe, Alex Bennée, 2024/07/05
- [PULL 23/40] plugins/lockstep: preserve sock_path, Alex Bennée, 2024/07/05
- [PULL 36/40] gdbstub: Make hex conversion function non-internal, Alex Bennée, 2024/07/05