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[PULL 11/40] tests/tcg/aarch64: Do not use x constraint
From: |
Alex Bennée |
Subject: |
[PULL 11/40] tests/tcg/aarch64: Do not use x constraint |
Date: |
Fri, 5 Jul 2024 16:30:23 +0100 |
From: Akihiko Odaki <akihiko.odaki@daynix.com>
clang version 18.1.6 does not support x constraint for AArch64.
Use w instead.
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240627-tcg-v2-5-1690a813348e@daynix.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240630190050.160642-7-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-12-alex.bennee@linaro.org>
diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c
index 7ac47b564e..f631197287 100644
--- a/tests/tcg/arm/fcvt.c
+++ b/tests/tcg/arm/fcvt.c
@@ -126,7 +126,7 @@ static void convert_single_to_half(void)
asm("vcvtb.f16.f32 %0, %1" : "=t" (output) : "x" (input));
#else
uint16_t output;
- asm("fcvt %h0, %s1" : "=w" (output) : "x" (input));
+ asm("fcvt %h0, %s1" : "=w" (output) : "w" (input));
#endif
print_half_number(i, output);
}
@@ -149,7 +149,7 @@ static void convert_single_to_double(void)
#if defined(__arm__)
asm("vcvt.f64.f32 %P0, %1" : "=w" (output) : "t" (input));
#else
- asm("fcvt %d0, %s1" : "=w" (output) : "x" (input));
+ asm("fcvt %d0, %s1" : "=w" (output) : "w" (input));
#endif
print_double_number(i, output);
}
@@ -244,7 +244,7 @@ static void convert_double_to_half(void)
/* asm("vcvtb.f16.f64 %0, %P1" : "=t" (output) : "x" (input)); */
output = input;
#else
- asm("fcvt %h0, %d1" : "=w" (output) : "x" (input));
+ asm("fcvt %h0, %d1" : "=w" (output) : "w" (input));
#endif
print_half_number(i, output);
}
@@ -267,7 +267,7 @@ static void convert_double_to_single(void)
#if defined(__arm__)
asm("vcvt.f32.f64 %0, %P1" : "=w" (output) : "x" (input));
#else
- asm("fcvt %s0, %d1" : "=w" (output) : "x" (input));
+ asm("fcvt %s0, %d1" : "=w" (output) : "w" (input));
#endif
print_single_number(i, output);
@@ -335,7 +335,7 @@ static void convert_half_to_double(void)
/* asm("vcvtb.f64.f16 %P0, %1" : "=w" (output) : "t" (input)); */
output = input;
#else
- asm("fcvt %d0, %h1" : "=w" (output) : "x" (input));
+ asm("fcvt %d0, %h1" : "=w" (output) : "w" (input));
#endif
print_double_number(i, output);
}
@@ -357,7 +357,7 @@ static void convert_half_to_single(void)
#if defined(__arm__)
asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" ((uint32_t)input));
#else
- asm("fcvt %s0, %h1" : "=w" (output) : "x" (input));
+ asm("fcvt %s0, %h1" : "=w" (output) : "w" (input));
#endif
print_single_number(i, output);
}
@@ -380,7 +380,7 @@ static void convert_half_to_integer(void)
/* asm("vcvt.s32.f16 %0, %1" : "=t" (output) : "t" (input)); v8.2*/
output = input;
#else
- asm("fcvt %s0, %h1" : "=w" (output) : "x" (input));
+ asm("fcvt %s0, %h1" : "=w" (output) : "w" (input));
#endif
print_int64(i, output);
}
--
2.39.2
- [PULL 07/40] tests/tcg: Adjust variable defintion from cc-option, (continued)
- [PULL 07/40] tests/tcg: Adjust variable defintion from cc-option, Alex Bennée, 2024/07/05
- [PULL 10/40] tests/tcg/aarch64: Fix irg operand type, Alex Bennée, 2024/07/05
- [PULL 13/40] tests/tcg/arm: Fix fcvt result messages, Alex Bennée, 2024/07/05
- [PULL 08/40] tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patterns, Alex Bennée, 2024/07/05
- [PULL 09/40] tests/tcg/aarch64: Explicitly specify register width, Alex Bennée, 2024/07/05
- [PULL 15/40] tests/tcg/arm: Use -fno-integrated-as for test-arm-iwmmxt, Alex Bennée, 2024/07/05
- [PULL 17/40] tests/tcg/arm: Use -march and -mfpu for fcvt, Alex Bennée, 2024/07/05
- [PULL 37/40] gdbstub: Pass CPU context to command handler, Alex Bennée, 2024/07/05
- [PULL 35/40] target/arm: Factor out code for setting MTE TCF0 field, Alex Bennée, 2024/07/05
- [PULL 40/40] tests/tcg/aarch64: Add MTE gdbstub tests, Alex Bennée, 2024/07/05
- [PULL 11/40] tests/tcg/aarch64: Do not use x constraint,
Alex Bennée <=
- [PULL 14/40] tests/tcg/arm: Drop -N from LDFLAGS, Alex Bennée, 2024/07/05
- [PULL 16/40] tests/tcg/arm: Manually register allocate half-precision numbers, Alex Bennée, 2024/07/05
- [PULL 27/40] plugins: Ensure vCPU index is assigned in init/exit hooks, Alex Bennée, 2024/07/05
- [PULL 32/40] gdbstub: Add support for target-specific stubs, Alex Bennée, 2024/07/05
- [PULL 21/40] test/plugin: make insn plugin less noisy by default, Alex Bennée, 2024/07/05
- [PULL 29/40] accel/tcg: Move qemu_plugin_vcpu_init__async() to plugins/, Alex Bennée, 2024/07/05
- [PULL 34/40] target/arm: Make some MTE helpers widely available, Alex Bennée, 2024/07/05
- [PULL 25/40] plugins/lockstep: mention the one-insn-per-tb option, Alex Bennée, 2024/07/05
- [PULL 24/40] plugins/lockstep: make mixed-mode safe, Alex Bennée, 2024/07/05
- [PULL 23/40] plugins/lockstep: preserve sock_path, Alex Bennée, 2024/07/05