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[PULL 09/40] tests/tcg/aarch64: Explicitly specify register width
From: |
Alex Bennée |
Subject: |
[PULL 09/40] tests/tcg/aarch64: Explicitly specify register width |
Date: |
Fri, 5 Jul 2024 16:30:21 +0100 |
From: Akihiko Odaki <akihiko.odaki@daynix.com>
clang version 18.1.6 assumes a register is 64-bit by default and
complains if a 32-bit value is given. Explicitly specify register width
when passing a 32-bit value.
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240627-tcg-v2-3-1690a813348e@daynix.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240630190050.160642-5-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-10-alex.bennee@linaro.org>
diff --git a/tests/tcg/aarch64/bti-1.c b/tests/tcg/aarch64/bti-1.c
index 99a879af23..1fada8108d 100644
--- a/tests/tcg/aarch64/bti-1.c
+++ b/tests/tcg/aarch64/bti-1.c
@@ -17,15 +17,15 @@ static void skip2_sigill(int sig, siginfo_t *info,
ucontext_t *uc)
#define BTI_JC "hint #38"
#define BTYPE_1(DEST) \
- asm("mov %0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %0,#0" \
+ asm("mov %w0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %w0,#0" \
: "=r"(skipped) : : "x16")
#define BTYPE_2(DEST) \
- asm("mov %0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %0,#0" \
+ asm("mov %w0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %w0,#0" \
: "=r"(skipped) : : "x16", "x30")
#define BTYPE_3(DEST) \
- asm("mov %0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %0,#0" \
+ asm("mov %w0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %w0,#0" \
: "=r"(skipped) : : "x15")
#define TEST(WHICH, DEST, EXPECT) \
diff --git a/tests/tcg/aarch64/bti-3.c b/tests/tcg/aarch64/bti-3.c
index 8c534c09d7..6a3bd037bc 100644
--- a/tests/tcg/aarch64/bti-3.c
+++ b/tests/tcg/aarch64/bti-3.c
@@ -11,15 +11,15 @@ static void skip2_sigill(int sig, siginfo_t *info,
ucontext_t *uc)
}
#define BTYPE_1() \
- asm("mov %0,#1; adr x16, 1f; br x16; 1: hint #25; mov %0,#0" \
+ asm("mov %w0,#1; adr x16, 1f; br x16; 1: hint #25; mov %w0,#0" \
: "=r"(skipped) : : "x16", "x30")
#define BTYPE_2() \
- asm("mov %0,#1; adr x16, 1f; blr x16; 1: hint #25; mov %0,#0" \
+ asm("mov %w0,#1; adr x16, 1f; blr x16; 1: hint #25; mov %w0,#0" \
: "=r"(skipped) : : "x16", "x30")
#define BTYPE_3() \
- asm("mov %0,#1; adr x15, 1f; br x15; 1: hint #25; mov %0,#0" \
+ asm("mov %w0,#1; adr x15, 1f; br x15; 1: hint #25; mov %w0,#0" \
: "=r"(skipped) : : "x15", "x30")
#define TEST(WHICH, EXPECT) \
--
2.39.2
- [PULL 01/40] tests/lcitool: fix debian-i686-cross toolchain prefix, (continued)
- [PULL 01/40] tests/lcitool: fix debian-i686-cross toolchain prefix, Alex Bennée, 2024/07/05
- [PULL 06/40] tests/tcg/minilib: Constify digits in print_num, Alex Bennée, 2024/07/05
- [PULL 12/40] tests/tcg/aarch64: Add -fno-integrated-as for sme, Alex Bennée, 2024/07/05
- [PULL 03/40] tracepoints: move physmem trace points, Alex Bennée, 2024/07/05
- [PULL 02/40] testing: restore some testing for i686, Alex Bennée, 2024/07/05
- [PULL 04/40] hw/core: ensure kernel_end never gets used undefined, Alex Bennée, 2024/07/05
- [PULL 07/40] tests/tcg: Adjust variable defintion from cc-option, Alex Bennée, 2024/07/05
- [PULL 10/40] tests/tcg/aarch64: Fix irg operand type, Alex Bennée, 2024/07/05
- [PULL 13/40] tests/tcg/arm: Fix fcvt result messages, Alex Bennée, 2024/07/05
- [PULL 08/40] tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patterns, Alex Bennée, 2024/07/05
- [PULL 09/40] tests/tcg/aarch64: Explicitly specify register width,
Alex Bennée <=
- [PULL 15/40] tests/tcg/arm: Use -fno-integrated-as for test-arm-iwmmxt, Alex Bennée, 2024/07/05
- [PULL 17/40] tests/tcg/arm: Use -march and -mfpu for fcvt, Alex Bennée, 2024/07/05
- [PULL 37/40] gdbstub: Pass CPU context to command handler, Alex Bennée, 2024/07/05
- [PULL 35/40] target/arm: Factor out code for setting MTE TCF0 field, Alex Bennée, 2024/07/05
- [PULL 40/40] tests/tcg/aarch64: Add MTE gdbstub tests, Alex Bennée, 2024/07/05
- [PULL 11/40] tests/tcg/aarch64: Do not use x constraint, Alex Bennée, 2024/07/05
- [PULL 14/40] tests/tcg/arm: Drop -N from LDFLAGS, Alex Bennée, 2024/07/05
- [PULL 16/40] tests/tcg/arm: Manually register allocate half-precision numbers, Alex Bennée, 2024/07/05
- [PULL 27/40] plugins: Ensure vCPU index is assigned in init/exit hooks, Alex Bennée, 2024/07/05
- [PULL 32/40] gdbstub: Add support for target-specific stubs, Alex Bennée, 2024/07/05