qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 1/1] target/riscv: Remove redundant insn length check for zam


From: Alistair Francis
Subject: Re: [PATCH 1/1] target/riscv: Remove redundant insn length check for zama16b
Date: Wed, 31 Jul 2024 19:38:15 +1000

On Thu, Jul 25, 2024 at 11:53 AM LIU Zhiwei
<zhiwei_liu@linux.alibaba.com> wrote:
>
>
> On 2024/7/23 13:59, Richard Henderson wrote:
> > On 7/23/24 15:29, LIU Zhiwei wrote:
> >> The more detailed information about its meaning is in priviledged
> >> 1.13 specification. More exactly, in 3.6.4. Misaligned Atomicity
> >> Granule PMA.
> >>
> >> The specification said:
> >>
> >> "The misaligned atomicity granule PMA applies only to AMOs, loads and
> >> stores defined in the base
> >> ISAs, and loads and stores of no more than MXLEN bits defined in the
> >> F, D, and Q extensions. For an
> >> instruction in that set, if all accessed bytes lie within the same
> >> misaligned atomicity granule, the
> >> instruction will not raise an exception for reasons of address
> >> alignment, and the instruction will give
> >> rise to only one memory operation for the purposes of RVWMO—i.e., it
> >> will execute atomically."
> >>
> >> That's the reason why I do not apply zama16b to compressed instructions.
> > Given the non-specificity of this paragraph, I think not specifically
> > calling out compressed forms of the base ISA is simply a documentation
> > error.  In general, the compressed ISA is supposed to be a smaller
> > encoding of the exact same instruction as the standard ISA.
>
> Yes, it's a documentation error. We will fix in the specification.
>
> https://github.com/riscv/riscv-isa-manual/pull/1557

Thanks for getting that clarified

What's the status of a followup patch? We should fix this before the release

Alistair



reply via email to

[Prev in Thread] Current Thread [Next in Thread]