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[RFC PATCH 07/11] target/ppc: implement address swizzle for instruction


From: Mark Cave-Ayland
Subject: [RFC PATCH 07/11] target/ppc: implement address swizzle for instruction translation
Date: Thu, 12 Dec 2024 15:14:08 +0000

Ensure that the address swizzle is implemented when retrieving instructions from
guest memory for translation.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
 target/ppc/translate.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index ddc0f85fb7..74aa398f25 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -6600,7 +6600,11 @@ static void ppc_tr_translate_insn(DisasContextBase 
*dcbase, CPUState *cs)
               ctx->base.pc_next, ctx->mem_idx, (int)msr_ir);
 
     ctx->cia = pc = ctx->base.pc_next;
-    insn = translator_ldl_swap(env, dcbase, pc, need_byteswap(ctx));
+    if (!need_addrswizzle_le(ctx)) {
+        insn = translator_ldl_swap(env, dcbase, pc, need_byteswap(ctx));
+    } else {
+        insn = translator_ldl(env, dcbase, pc ^ 4);
+    }
     ctx->base.pc_next = pc += 4;
 
     if (!is_prefix_insn(ctx, insn)) {
@@ -6616,8 +6620,13 @@ static void ppc_tr_translate_insn(DisasContextBase 
*dcbase, CPUState *cs)
         gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_INSN);
         ok = true;
     } else {
-        uint32_t insn2 = translator_ldl_swap(env, dcbase, pc,
-                                             need_byteswap(ctx));
+        uint32_t insn2;
+
+        if (!need_addrswizzle_le(ctx)) {
+            insn2 = translator_ldl_swap(env, dcbase, pc, need_byteswap(ctx));
+        } else {
+            insn2 = translator_ldl(env, dcbase, pc ^ 4);
+        }
         ctx->base.pc_next = pc += 4;
         ok = decode_insn64(ctx, deposit64(insn2, 32, 32, insn));
     }
-- 
2.39.5




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