[Qemu-devel] [PATCH 084/111] m68k: correct fmovemx FP registers order.

[Bryce Lanham]

From: Laurent Vivier <address@hidden>

seen with gcc testsuite,
gcc-4.1.2/gcc/testsuite/gcc.c-torture/execute/930622-2.c

allow to run gtk-demo, gimp ...

Signed-off-by: Laurent Vivier <address@hidden>
---
 target-m68k/translate.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index e9b6abc..14ce1f9 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3536,18 +3536,18 @@ static void gen_op_fmovem(DisasContext *s, uint32_t 
insn, uint32_t ext)
     mask = ext & 0x00FF;
 
     if (!is_load && (mode & 2) == 0) {
-        for (i = 7; i >= 0; i--, mask >>= 1) {
-            if (mask & 1) {
+        for (i = 7; i >= 0; i--, mask <<= 1) {
+            if (mask & 0x80) {
                 gen_op_load_fpr_FP0(i);
                 gen_store_FP0(s, opsize, addr);
-                if (mask != 1)
+                if ((mask & 0xff) != 0x80)
                     tcg_gen_subi_i32(addr, addr, incr);
             }
         }
         tcg_gen_mov_i32(AREG(insn, 0), addr);
     } else{
-        for (i = 0; i < 8; i++, mask >>=1) {
-            if (mask & 1) {
+        for (i = 0; i < 8; i++, mask <<=1) {
+            if (mask & 0x80) {
                 if (is_load) {
                     gen_load_FP0(s, opsize, addr);
                     gen_op_store_fpr_FP0(i);
@@ -3555,7 +3555,7 @@ static void gen_op_fmovem(DisasContext *s, uint32_t insn, 
uint32_t ext)
                     gen_op_load_fpr_FP0(i);
                     gen_store_FP0(s, opsize, addr);
                 }
-               if (mask != 1 || (insn & 070) == 030)
+               if ((mask & 0xff) != 0x80 || (insn & 070) == 030)
                    tcg_gen_addi_i32(addr, addr, incr);
             }
         }
-- 
1.7.2.3